[PATCH v4 11/12] drm/mediatek: mtk_dp: Add support for eDP1.5 IPs and MT8196 SoC

[CK Hu (胡俊光)]

On Thu, 2026-07-09 at 13:31 +0200, AngeloGioacchino Del Regno wrote:
> Add support for MediaTek's Embedded DisplayPort (eDP) v1.5 IP as
> found in the MT8196 SoC and other variants, and enclose some of
> the new register writes in specific platform data booleans, as:
>  - SDP on Encoder1 can be supported by both old and new IPs
>    but it was chosen to use Encoder0 for SDP in the new ones
>    in order to decrease the load on the secondary encoder;
>  - PSR can be supported by older IPs as well, but was not tested
>    on those yet (requires a display with PSR support connected
>    to a device with older SoC, and I don't have it right now);
>  - Power State forcing may not be needed on newer revisions of
>    the eDP/DP IP (in SoCs newer than MT8196/MT6991).
> 
> As a note, even if this effectively adds some partial support for
> the DisplayPort 1.4 IP from the same SoC (because the DP1.4 and
> eDP1.5 IPs in this SoC have some little common parts in common),
> there is still a long road ahead to actually enable support for
> the DP1.4 IP itself.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_dp.c     | 289 +++++++++++++++++++++++---
>  drivers/gpu/drm/mediatek/mtk_dp_reg.h |  61 +++++-
>  2 files changed, 315 insertions(+), 35 deletions(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c
> index 772ba311a34a..fe7e05e27f6f 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dp.c
> @@ -2,6 +2,8 @@
>  /*
>   * Copyright (c) 2019-2022 MediaTek Inc.
>   * Copyright (c) 2022 BayLibre
> + * Copyright (c) 2026 Collabora Ltd
> + *                    AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
>   */
>  
>  #include <drm/display/drm_dp_aux_bus.h>
> @@ -57,6 +59,8 @@
>  #define MTK_DP_TOP_OFFSET_LEGACY	0x2000
>  
>  #define MTK_DP_SIP_CONTROL_AARCH32	MTK_SIP_SMC_CMD(0x523)
> +#define MTK_DP_SIP_ATF_EDP_SET_VID_MUTE	34
> +#  define MTK_DP_SIP_REQ_VIDEO_UNMUTE	0xfefd

Align to other indent.

>  #define MTK_DP_SIP_ATF_EDP_VIDEO_UNMUTE	33
>  #define MTK_DP_SIP_ATF_VIDEO_UNMUTE	32
>  
> @@ -168,7 +172,11 @@ struct mtk_dp_data {
>  	bool audio_pkt_in_hblank_area;
>  	u16 audio_m_div2_bit;
>  	u8 hw_max_link_rate;
> +	bool hwip_v1p4;
>  	bool aux_hpd_supported;
> +	bool sdp_encoder1_enable;
> +	bool force_pwr_states;
> +	bool psr_supported;

Break this patch into hwip_v1p4, sdp_encoder1_enable, force_pwr_states, psr_supported, and MT8196 SoC support.

Regards,
CK

>  };
>