[PATCH v4 09/12] drm/mediatek: mtk_dp: Move max link rate to SoC specific data

[CK Hu (胡俊光)]

On Thu, 2026-07-09 at 13:31 +0200, AngeloGioacchino Del Regno wrote:
> In preparation for adding support for the eDP IP found in the
> MT8196 SoC, having a higher supported maximum link rate, move
> this parameter to SoC data instead of statically assigning it
> to the training info during initialization.

Reviewed-by: CK Hu <ck.hu at mediatek.com>

> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_dp.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c
> index e2a6001fc0cc..ea970a9bfe93 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dp.c
> @@ -167,6 +167,7 @@ struct mtk_dp_data {
>  	bool audio_supported;
>  	bool audio_pkt_in_hblank_area;
>  	u16 audio_m_div2_bit;
> +	u8 hw_max_link_rate;
>  };
>  
>  static const struct mtk_dp_efuse_fmt mt8188_dp_efuse_fmt[MTK_DP_CAL_MAX] = {
> @@ -1469,7 +1470,7 @@ static void mtk_dp_initialize_priv_data(struct mtk_dp *mtk_dp)
>  {
>  	bool plugged_in = (mtk_dp->bridge.type == DRM_MODE_CONNECTOR_eDP);
>  
> -	mtk_dp->train_info.link_rate = DP_LINK_BW_5_4;
> +	mtk_dp->train_info.link_rate = mtk_dp->data->hw_max_link_rate;
>  	mtk_dp->train_info.lane_count = mtk_dp->max_lanes;
>  	mtk_dp->train_info.cable_plugged_in = plugged_in;
>  
> @@ -2996,6 +2997,7 @@ static const struct mtk_dp_data mt8188_dp_data = {
>  	.audio_supported = true,
>  	.audio_pkt_in_hblank_area = true,
>  	.audio_m_div2_bit = MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
> +	.hw_max_link_rate = DP_LINK_BW_5_4,
>  };
>  
>  static const struct mtk_dp_data mt8195_edp_data = {
> @@ -3004,6 +3006,7 @@ static const struct mtk_dp_data mt8195_edp_data = {
>  	.efuse_fmt = mt8195_edp_efuse_fmt,
>  	.audio_supported = false,
>  	.audio_m_div2_bit = MT8195_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
> +	.hw_max_link_rate = DP_LINK_BW_5_4,
>  };
>  
>  static const struct mtk_dp_data mt8195_dp_data = {
> @@ -3012,6 +3015,7 @@ static const struct mtk_dp_data mt8195_dp_data = {
>  	.efuse_fmt = mt8195_dp_efuse_fmt,
>  	.audio_supported = true,
>  	.audio_m_div2_bit = MT8195_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
> +	.hw_max_link_rate = DP_LINK_BW_5_4,
>  };
>  
>  static const struct of_device_id mtk_dp_of_match[] = {