[PATCH] arm64: dts: rockchip: rk3399pro-vmarc-som: add i2c2 scl timing

[Heiko Stuebner]

Hi Rudi,

Am Montag, 24. August 2026, 05:06:43 Mitteleuropäische Sommerzeit schrieb Rudi Heitbaum:
> The hym8563 on i2c2 does not ack:
> 
>   rtc-hym8563 2-0051: could not init device, -6
> 
> It is also the ext_clock for sdio-pwrseq, so wifi does not come up
> either.
> 
> i2c2 runs at 400 kHz with no scl edge times. The core defaults both to
> 300 ns and rk3x-i2c calculates a 900 ns high period, which is short for
> this bus - it acks at 100 kHz. Set the edges to the values i2c3 already
> uses, giving 1050 ns at 400 kHz.
> 
> Tested on a Radxa ROCK Pi N10: rtc0 registers and keeps time across a
> reboot, and wifi activates.

You tested on a Radxa Rock PI N10, but are changing the vmarc-som?
I'm not really understanding this.


Heiko

> 
> Signed-off-by: Rudi Heitbaum <rudi at heitbaum.com>
> ---
>  arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
> index 64e6ba345739..074f09c6d11c 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
> @@ -296,6 +296,8 @@ &i2c1 {
>  
>  &i2c2 {
>  	clock-frequency = <400000>;
> +	i2c-scl-falling-time-ns = <15>;
> +	i2c-scl-rising-time-ns = <450>;
>  	status = "okay";
>  
>  	hym8563: rtc at 51 {
>