[PATCH 4/5] spi: ma35d1-qspi: Add DTR support

[Mark Brown]

On Thu, Aug 13, 2026 at 10:00:24AM +0200, Miquel Raynal wrote:
> The controller has DTR support, a bit must be set for it. The behaviour
> is interesting though, as the speed won't improve when enabled. This is
> because there seems to be an internal divisor (/2) which keeps the rate
> equal when DTR is enabled. As a result, this commit also doubles the
> target bus speed, which in practice does not happen. This way, there is
> a real gain:

> @@ -567,7 +577,8 @@ static int nuvoton_qspi_transfer_one(struct spi_controller *ctlr,
>  			buswidth = 2;
>  	}
>  
> -	ret = nuvoton_qspi_configure_bus(spi, buswidth, dir, xfer->speed_hz);
> +	ret = nuvoton_qspi_configure_bus(spi, buswidth, dir, xfer->speed_hz,
> +					 xfer->dtr_mode);
>  	if (ret)
>  		return ret;

This needs ctlr->dtr_caps configuring, otherwise the validation will
block it - only the _mem_caps were updated.
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