[PATCH v2 0/3] mtd: rawnand: sunxi: fix H6/H616 controller timings

[Miquel Raynal]

Hi James,

On 17/07/2026 at 11:33:56 -06, James Hilliard <james.hilliard1 at gmail.com> wrote:

> The sunxi NAND timing solver currently applies the original A10 NDFC
> timing characteristics to every supported controller. The H6/H616 NDFC
> uses two internal cycles for several setup and hold intervals and has
> different delay-field encodings, so the resulting clock and timing
> register values do not match the hardware.
>
> Prepare for per-controller timing data in two behaviorally focused
> patches, then add and select the H616 characteristics in the final fix.
> Legacy controllers retain their existing setup-cycle behavior and delay
> encodings.
>
> Tested on an H616 board with Toshiba TC58NVG1S3H NAND.
>
> Signed-off-by: James Hilliard <james.hilliard1 at gmail.com>

There are a number of checkpatch issue. Can you please fix them? (except
the camelcase one which is fine with timing names coming from the ONFI
spec).

Thanks,
Miquèl