[PATCH v3 1/5] ARM: dts: aspeed: santabarbara: Add system monitoring GPIOs
Fred Chen
fredchen.openbmc at gmail.com
Fri Aug 7 01:34:04 PDT 2026
Add several GPIO expanders on the switch board for NIC, PEX, and cable
presence monitoring. Due to a design change, ioexp0 (0x20) now
aggregates interrupts from the downstream expanders (0x21-0x27) onto a
single sgpiom0 line, reducing the number of sideband interrupt pins
required.
The new nodes provide:
- NIC1-4 power good monitoring, reset control, and fault detection
- Switch PEX power good signals and hardware SKU/Revision IDs
- Cable presence detection and selection for four SPI flashes
- System power fault alert via SGPIO and E1S GPIO expander interrupt
Signed-off-by: Fred Chen <fredchen.openbmc at gmail.com>
---
.../aspeed-bmc-facebook-santabarbara.dts | 125 +++++++++++++++++-
1 file changed, 124 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
index 0a3e2e241063..2a822e38f091 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
@@ -616,6 +616,8 @@ gpio at 74 {
reg = <0x74>;
gpio-controller;
#gpio-cells = <2>;
+ interrupt-parent = <&sgpiom0>;
+ interrupts = <146 IRQ_TYPE_LEVEL_LOW>;
gpio-line-names =
"P12V_E1S_ADC_ALERT","BUFF0_100M_LOSB_PLD",
"E1S_BP_SKU_ID0","E1S_BP_SKU_ID1",
@@ -1335,6 +1337,112 @@ eeprom at 50 {
&i2c12 {
status = "okay";
+ ioexp0: gpio at 20 {
+ compatible = "nxp,pca9555";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&sgpiom0>;
+ interrupts = <148 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "IOEXP_21h_INT_N","IOEXP_22h_INT_N",
+ "IOEXP_23h_INT_N","IOEXP_24h_INT_N",
+ "IOEXP_25h_INT_N","IOEXP_26h_INT_N",
+ "IOEXP_27h_INT_N","SWB_PWR_FAULT_N",
+ "","","","",
+ "","","","";
+ };
+
+ gpio at 21 {
+ compatible = "nxp,pca9555";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&ioexp0>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "PDB_PRSNT_J1_N","PDB_PRSNT_J2_N",
+ "PRSNT_NIC1_N","PRSNT_NIC2_N",
+ "PRSNT_NIC3_N","PRSNT_NIC4_N",
+ "","",
+ "CBL_PRSNT_MCIO_0_N","CBL_PRSNT_MCIO_1_N",
+ "CBL_PRSNT_MCIO_2_N","CBL_PRSNT_MCIO_3_N",
+ "","","","";
+ };
+
+ gpio at 22 {
+ compatible = "nxp,pca9555";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&ioexp0>;
+ interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "SWB_PWRGD_P3V3_AUX","SWB_PWRGD_P1V8_PEX",
+ "SWB_PWRGD_P1V8_AUX","SWB_PWRGD_P5V",
+ "SWB_PWRGD_P1V5_PEX","SWB_PWRGD_P1V2_PEX",
+ "SWB_PWRGD_P0V895_PEX","SWB_PWRGD_P0V81_PEX_0",
+ "SWB_PWRGD_P0V81_PEX_1","SWB_PWRGD_P0V81_REFCLK",
+ "SWB_PWRGD_MODULE","",
+ "","","","";
+ };
+
+ gpio at 24 {
+ compatible = "nxp,pca9555";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&ioexp0>;
+ interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "RST_PERST_NIC1_N","RST_PERST_NIC2_N",
+ "RST_PERST_NIC3_N","RST_PERST_NIC4_N",
+ "RST_PERST_MCIO_0_N","RST_PERST_MCIO_1_N",
+ "RST_PERST_MCIO_2_N","RST_PERST_MCIO_3_N",
+ "FM_P3V3_NIC1_FAULT_N","FM_P3V3_NIC2_FAULT_N",
+ "FM_P3V3_NIC3_FAULT_N","FM_P3V3_NIC4_FAULT_N",
+ "PWRGD_P12V_NIC1","PWRGD_P12V_NIC2",
+ "PWRGD_P12V_NIC3","PWRGD_P12V_NIC4";
+ };
+
+ gpio at 25 {
+ compatible = "nxp,pca9555";
+ reg = <0x25>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&ioexp0>;
+ interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "NIC1_MAIN_R_PWR_EN","NIC2_MAIN_R_PWR_EN",
+ "NIC3_MAIN_R_PWR_EN","NIC4_MAIN_R_PWR_EN",
+ "FM_PLD_NIC1_AUX_PWR_EN","FM_PLD_NIC2_AUX_PWR_EN",
+ "FM_PLD_NIC3_AUX_PWR_EN","FM_PLD_NIC4_AUX_PWR_EN",
+ "PWRGD_NIC1","PWRGD_NIC2",
+ "PWRGD_NIC3","PWRGD_NIC4",
+ "PWRGD_P3V3_NIC1","PWRGD_P3V3_NIC2",
+ "PWRGD_P3V3_NIC3","PWRGD_P3V3_NIC4";
+ };
+
+ gpio at 26 {
+ compatible = "nxp,pca9555";
+ reg = <0x26>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&ioexp0>;
+ interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "SWB_SKU_ID_0","SWB_SKU_ID_1",
+ "SWB_SKU_ID_2","SWB_SKU_ID_3",
+ "SWB_REV_ID_0","SWB_REV_ID_1",
+ "SWB_REV_ID_2","",
+ "RST_PLD_PEX_PERST_N","CPLD_MB_PWR_EN",
+ "RST_PERST_SWB_R_N","SWB_LEAK_DETECT",
+ "PEX_SYS_ERR_FPGA","PRSNT_SWB_LEAK_CABLE_N",
+ "","";
+ };
+
gpio at 27 {
compatible = "nxp,pca9555";
reg = <0x27>;
@@ -1349,6 +1457,21 @@ gpio at 27 {
"SPI_MUX_SEL","","","";
};
+ gpio at 28 {
+ compatible = "nxp,pca9555";
+ reg = <0x28>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names =
+ "SCO_UART_MUX_SEL0","SCO_UART_MUX_SEL1",
+ "SPI_PROG_PL12_SEL","SPI_PROG_PL34_SEL",
+ "","","","",
+ "I3C_HUB_3_MUX_SEL_PLD","",
+ "SPI_PROG_PL12_EN_N","SPI_PROG_PL34_EN_N",
+ "SCO1_SPI_SEL","SCO2_SPI_SEL",
+ "SCO3_SPI_SEL","SCO4_SPI_SEL";
+ };
+
// SWB FRU
eeprom at 52 {
compatible = "atmel,24c64";
@@ -1776,7 +1899,7 @@ &sgpiom0 {
"MB_SKU_ID_1","PASSWORD_CLEAR",
"MB_SKU_ID_2","",
"MB_SKU_ID_3","",
- "","BIOS_DEBUG_MODE",
+ "SYS_PWR_FAULT_ALERT","BIOS_DEBUG_MODE",
/*H0-H3 line 112-119*/
"FM_IOEXP_U538_INT_N","",
"FM_IOEXP_U539_INT_N","FM_MODULE_PWR_EN_N_1B",
--
2.52.0
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