[PATCH 3/3] arm64: dts: agilex5: Enable pagepool Tx buffer quirk
muhammad.nazim.amirul.nazle.asmade at altera.com
muhammad.nazim.amirul.nazle.asmade at altera.com
Mon Aug 3 00:05:13 PDT 2026
From: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade at altera.com>
Enable snps,pagepool-tx-buf-quirk for Agilex5 gmac0/1/2. These ports
use an IOMMU, where avoiding per-packet dma map/unmap invalidate cost
improves Tx performance.
Signed-off-by: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade at altera.com>
---
arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index f54767d1526e..4ce4fa091385 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -605,6 +605,7 @@ gmac0: ethernet at 10810000 {
snps,mtl-tx-config = <&mtl_tx_emac0_setup>;
snps,pbl = <32>;
snps,tso;
+ snps,pagepool-tx-buf-quirk;
altr,sysmgr-syscon = <&sysmgr 0x44 0>;
snps,clk-csr = <0>;
iommus = <&smmu 1>;
@@ -751,6 +752,7 @@ gmac1: ethernet at 10820000 {
snps,mtl-tx-config = <&mtl_tx_emac1_setup>;
snps,pbl = <32>;
snps,tso;
+ snps,pagepool-tx-buf-quirk;
altr,sysmgr-syscon = <&sysmgr 0x48 0>;
snps,clk-csr = <0>;
iommus = <&smmu 2>;
@@ -897,6 +899,7 @@ gmac2: ethernet at 10830000 {
snps,mtl-tx-config = <&mtl_tx_emac2_setup>;
snps,pbl = <32>;
snps,tso;
+ snps,pagepool-tx-buf-quirk;
altr,sysmgr-syscon = <&sysmgr 0x4c 0>;
snps,clk-csr = <0>;
iommus = <&smmu 3>;
--
2.43.7
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