[PATCH v1 1/3] dt-bindings: PCI: imx6q-pcie: Add intr, aer and pme interrupts
Hongxing Zhu
hongxing.zhu at nxp.com
Sun Apr 26 20:17:12 PDT 2026
> -----Original Message-----
> From: Conor Dooley <conor at kernel.org>
> Sent: Saturday, April 25, 2026 1:06 AM
> To: Hongxing Zhu <hongxing.zhu at nxp.com>
> Cc: robh at kernel.org; krzk+dt at kernel.org; conor+dt at kernel.org;
> bhelgaas at google.com; Frank Li <frank.li at nxp.com>; l.stach at pengutronix.de;
> lpieralisi at kernel.org; kwilczynski at kernel.org; mani at kernel.org;
> s.hauer at pengutronix.de; kernel at pengutronix.de; festevam at gmail.com; linux-
> pci at vger.kernel.org; linux-arm-kernel at lists.infradead.org;
> devicetree at vger.kernel.org; imx at lists.linux.dev; linux-kernel at vger.kernel.org
> Subject: Re: [PATCH v1 1/3] dt-bindings: PCI: imx6q-pcie: Add intr, aer and pme
> interrupts
>
> On Fri, Apr 24, 2026 at 10:57:33AM +0800, Richard Zhu wrote:
> > Add optional 'intr', 'aer', and 'pme' interrupt entries to the i.MX6Q
> > PCIe binding to support PCIe event-based interrupts for general
> > controller events, Advanced Error Reporting, and Power Management
> > Events respectively.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu at nxp.com>
> > ---
>
> This binding supports lots of devices. Do they all have these additional interrupts?
Currently, only i.MX95 PCIe has these dedicated SPI interrupts. The earlier
SoCs in this binding (i.MX6Q/6SX/7D/8MQ/8MM/8MP, etc.) do not expose these as
separate interrupt lines.
I can constrain these three interrupt entries to be valid only for the i.MX95
variant using conditional schemas. Would that be acceptable?
Best Regards
Richard Zhu
>
> > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 6 ++++++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> > b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> > index 9d1349855b422..badc7fcbd556c 100644
> > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> > @@ -58,12 +58,18 @@ properties:
> > items:
> > - description: builtin MSI controller.
> > - description: builtin DMA controller.
> > + - description: PCIe event interrupt.
> > + - description: builtin AER SPI standalone interrupter line.
> > + - description: builtin PME SPI standalone interrupter line.
> >
> > interrupt-names:
> > minItems: 1
> > items:
> > - const: msi
> > - const: dma
> > + - const: intr
> > + - const: aer
> > + - const: pme
> >
> > reset-gpio:
> > description: Should specify the GPIO for controlling the PCI bus
> > device
> > --
> > 2.37.1
> >
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