[PATCH v5 01/12] coresight: etm4x: fix wrong check of etm4x_sspcicrn_present()

Suzuki K Poulose suzuki.poulose at arm.com
Tue Apr 21 01:47:54 PDT 2026


On 15/04/2026 17:55, Yeoreum Yun wrote:
> According to Embedded Trace Macrocell Architecture Specification
> ETMv4.0 to ETM4.6 [0], TRCSSPCICR<n> is present only if all of
> the following are true:
> 
>    - TRCIDR4.NUMSSCC > n.
>    - TRCIDR4.NUMPC > 0b0000.
>    - TRCSSCSR<n>.PC == 0b1.
> 
> Comment for etm4x_sspcicrn_present() is align with the specification.
> However, the check should use drvdata->nr_pe_cmp to check TRCIDR4.NUMPC
> not nr_pe.
> 
> Link: https://developer.arm.com/documentation/ihi0064/latest/ [0]

Fixes: f6a18f354c58 ("coresight: etm4x: Handle access to TRCSSPCICRn")

With that looks good to me

Suzuki

> Signed-off-by: Yeoreum Yun <yeoreum.yun at arm.com>
> ---
>   drivers/hwtracing/coresight/coresight-etm4x-core.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> index d565a73f0042..74b7063d130e 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> @@ -89,7 +89,7 @@ static int etm4_probe_cpu(unsigned int cpu);
>   static bool etm4x_sspcicrn_present(struct etmv4_drvdata *drvdata, int n)
>   {
>   	return (n < drvdata->nr_ss_cmp) &&
> -	       drvdata->nr_pe &&
> +	       drvdata->nr_pe_cmp &&
>   	       (drvdata->config.ss_status[n] & TRCSSCSRn_PC);
>   }
>   




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