[PATCH v2 1/1] reset: imx7: Correct polarity of MIPI CSI resets on i.MX8MQ

Philipp Zabel p.zabel at pengutronix.de
Fri Apr 17 01:47:48 PDT 2026


On Fr, 2026-04-17 at 16:08 +0800, Robby Cai wrote:
> On i.MX8MQ, the MIPI CSI reset lines are active-low and not self-clearing.
> Writing '0' asserts reset and it remains asserted until explicitly
> deasserted by software.
> 
> This driver previously treated the MIPI CSI reset signals as active-high,
> which led to incorrect reset assert/deassert sequencing. This issue was
> exposed by commit 6d79bb8fd2aa ("media: imx8mq-mipi-csi2: Explicitly
> release reset").

If this patch is backported without 6d79bb8fd2aa, or the other way
around, will that break MIPI CSI-2 on older kernels? That would warrant
a Cc: stable tag.


Otherwise,

Reviewed-by: Philipp Zabel <p.zabel at pengutronix.de>

regards
Philipp



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