[PATCH/RFT] arm64: dts: renesas: r8a78000: Fix SCIF brg_int clocks

[Geert Uytterhoeven]

On Tue, 6 Jan 2026 at 18:09, Geert Uytterhoeven <geert+renesas at glider.be> wrote:
> According to the documentation, the internal clock input for the BRG is
> SGASYNCD4_PERW_BUSφ.
>
> Fixes: c13a643e2c491f5b ("arm64: dts: renesas: Add R8A78000 SoC support")
> Signed-off-by: Geert Uytterhoeven <geert+renesas at glider.be>
> ---
> Untested due to lack of access of local hardware.
>
> This is consistent with SCIF on other SOCs, where fck typically runs at
> 1/4 of the speed of brg_int.
>
> The correctness of the clock rates of the various clock sources can be
> tested by forcing the use of  "fck", "brg_int" or "scif_clk", by
> commenting out all but one of the four blocks below the "There can be
> multiple sources for the sampling clock" in drivers/tty/serial/sh-sci.c.

Confirmed on actual hardware, will queue in renesas-devel for v7.2.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds