[PATCH v2 0/4] usb: dwc3: xilinx: Add Versal2 MMI USB 3.2 controller support

Pandey, Radhey Shyam radheys at amd.com
Mon Apr 13 04:33:39 PDT 2026


> On Tue, Mar 31, 2026, Radhey Shyam Pandey wrote:
>> This series introduces support for the Multi-Media Integrated (MMI) USB
>> 3.2 Dual-Role Device (DRD) controller on Xilinx Versal2 platforms.
>>
>> The controller supports SSP(10-Gbps), SuperSpeed, high-speed, full-speed
>> and low-speed operation modes.
>>
>> USB2 and USB3 PHY support Physical connectivity via the Type-C
>> connectivity. DWC3 wrapper IP IO space is in SLCR so reg is made
>> optional.
>>
>> The driver is required for the clock, reset and platform specific
>> initialization (coherency/TX_DEEMPH etc). In this initial version typec
>> reversibility is not implemented and it is assumed that USB3 PHY TCA mux
>> programming is done by MMI configuration data object (CDOs) and TI PD
>> controller is configured using external tiva programmer on VEK385
>> evaluation board.
>>
>> Changes for v2:
>> - DT binding: fix MHz spacing (SI convention), reorder description
>>    before $ref in xlnx,usb-syscon, restore zynqmp-dwc3 example and add
>>    versal2-mmi-dwc3 example, fix node name for no-reg case, use 1/1
>>    address/size configuration and lowercase hex in syscon offsets.
>> - Split config struct refactoring (device_get_match_data,dwc3_xlnx_config)
>>    into a separate preparatory patch.
>> - Fix error message capitalization to lowercase per kernel convention.
>> - Rename property snps,lcsr_tx_deemph to snps,lcsr-tx-deemph (hyphens).
>> - Fix double space in comment and missing blank line in core.h.
>> - Use platform data instead of of_device_is_compatible() check for
>>    deemphasis support.
>>
>> Link: https://urldefense.com/v3/__https://lore.kernel.org/all/20251119193036.2666877-1-radhey.shyam.pandey@amd.com/__;!!A4F2R9G_pg!YSeyY-bpQrMLqswAc1cWND5CSHvGFygPGMEMpR9amrRMnRFjYrFZktzbLzEzVZcQmOW34IUAfwRKHwy7B8p_ciUorWGJsA$
>>
>> Radhey Shyam Pandey (4):
>>    dt-bindings: usb: dwc3-xilinx: Add MMI USB support on Versal Gen2
>>      platform
>>    usb: dwc3: xilinx: Introduce dwc3_xlnx_config for per-platform data
>>    usb: dwc3: xilinx: Add Versal2 MMI USB 3.2 controller support
>>    usb: dwc3: xilinx: Add support to program MMI USB TX deemphasis
>>
>>   .../devicetree/bindings/usb/dwc3-xilinx.yaml  | 70 ++++++++++++++-
>>   drivers/usb/dwc3/core.c                       | 17 ++++
>>   drivers/usb/dwc3/core.h                       |  8 ++
>>   drivers/usb/dwc3/dwc3-xilinx.c                | 89 +++++++++++++++----
>>   4 files changed, 166 insertions(+), 18 deletions(-)
>>
>>
>> base-commit: 46b513250491a7bfc97d98791dbe6a10bcc8129d
>> -- 
>> 2.43.0
>>
> Hi Radhey,
>
> Do you have plans to convert dwc3-xilinx to using the new flatten model?
> The change you have here fits better for the new glue model.
Thanks Thinh for the review.

I have looked into the newly introduced flattened model introduced by
commit 613a2e655d4d ("usb: dwc3: core: Expose core driver as library").
Moving to that approach would require switching to the new DT binding
and doing a large refactor.

Given this series is already implemented and under review,
I suggest we get it merged first, then evaluate the flattened models
benefits and limitations and plan a follow‑up migration if it still
makes sense. If there are no objections, I'll send out v3.

Thanks,
Radhey



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