[PATCH v10 00/20] CoreSight: Refactor power management for CoreSight path
Jie Gan
jie.gan at oss.qualcomm.com
Mon Apr 13 03:30:18 PDT 2026
On 4/5/2026 11:02 PM, Leo Yan wrote:
> This series focuses on CoreSight path power management. The changes can
> be divided into four parts for review:
>
> Patches 01 - 04: Refactor the CPU ID storing in csdev, later patches
> consume csdev->cpu. Move CPU lock to sysfs layer so
> it is safe for later changes.
> Patches 05 - 09: Refactor the CPU idle flow with moving common code into
> the CoreSight core layer.
> Patches 10 - 15: Refactor path enabling and disabling with range, add
> path control during CPU idle.
> Patches 16 - 17: Support the sink (TRBE) control during CPU idle.
> Patches 18 - 20: Move CPU hotplug into the core layer, and fix sysfs
> mode for hotplug.
>
> This series is rebased on the coresight-next branch and has been verified
> on Juno-r2 (ETM + ETR) and FVP RevC (ETE + TRBE). Built successfully
> for armv7 (ARCH=arm).
>
tested on QCOM sa8775-ride:
=== 1. Sysfs mode: basic enable/disable ===
PASS: Sink tmc_etr0 enabled
PASS: Source etm0 enabled
PASS: Source etm0 disabled cleanly
PASS: Sink tmc_etr0 disabled cleanly
=== 2. Sysfs mode: repeated enable/disable cycles (10x) ===
PASS: 10 enable/disable cycles completed without error
=== 3. Sysfs mode: enable source with no active sink ===
PASS: Enable without sink returned error (expected)
=== 4. Sysfs mode: enable/disable all per-CPU sources ===
etm0 (cpu0): enabled OK
etm1 (cpu1): enabled OK
etm2 (cpu2): enabled OK
etm3 (cpu3): enabled OK
etm4 (cpu4): enabled OK
etm5 (cpu5): enabled OK
etm6 (cpu6): enabled OK
etm7 (cpu7): enabled OK
PASS: All online per-CPU sources enabled/disabled successfully
=== 5. CPU hotplug: offline CPU while sysfs tracing active ===
Using source etm1 on cpu1
Tracing active on cpu1, offlining CPU...
[ 82.805359] psci: CPU1 killed (polled 0 ms)
PASS: Source auto-disabled on CPU offline
[ 83.346033] Detected PIPT I-cache on CPU1
[ 83.346114] GICv3: CPU1: found redistributor 100 region
0:0x0000000017a80000
[ 83.346283] CPU1: Booted secondary processor 0x0000000100 [0x410fd4b2]
PASS: Source re-enabled after CPU re-online
=== 6. Sysfs: enable source on offline CPU (expect ENODEV) ===
[ 84.013788] psci: CPU1 killed (polled 0 ms)
PASS: Enable on offline cpu1 rejected (enable_source=0)
[ 84.349558] Detected PIPT I-cache on CPU1
[ 84.349640] GICv3: CPU1: found redistributor 100 region
0:0x0000000017a80000
[ 84.349811] CPU1: Booted secondary processor 0x0000000100 [0x410fd4b2]
=== 7. CPU PM: trace survives CPU idle entry/exit ===
Sleeping 3s to allow CPU idle entry...
Idle entries on cpu0 during test: 35
PASS: Source still enabled after idle (PM save/restore working)
=== 8. Perf mode: basic cs_etm recording ===
SKIP: perf not found in PATH
=== 11. TRBE: check save/restore sysfs nodes (if present) ===
SKIP: No TRBE devices found
Tested-by: Jie Gan <jie.gan at oss.qualcomm.com>
Thanks,
Jie
> ---
> Changes in v10:
> - Removed redundant checks in ETMv4 PM callbacks (sashiko).
> - Added a new const structure etm4_cs_pm_ops (sashiko).
> - Used fine-grained spinlock on sysfs_active_config (sashiko).
> - Blocked notification after failures in save / restore to avoid lockups.
> - Changed Change CPUHP_AP_ARM_CORESIGHT_STARTING to
> CPUHP_AP_ARM_CORESIGHT_ONLINE so that the CPU hotplug callback runs in
> the thread context (sashiko).
> - Link to v9: https://lore.kernel.org/r/20260401-arm_coresight_path_power_management_improvement-v9-0-091d73e44072@arm.com
>
> Changes in v9:
> - Changed to use per-CPU path pointer with lockless access.
> - Removed the change for adding csdev->path, the related refactoring
> will be sent separately.
> - Re-orged patches to avoid intermediate breakage (sashiko).
> - Link to v8: https://lore.kernel.org/r/20260325-arm_coresight_path_power_management_improvement-v8-0-7b1902e18041@arm.com
>
> Changes in v8:
> - Moved the "cpu" field in coresight_device for better pack with new
> patch 01 (Suzuki).
> - Added check if not set CPU for per_cpu_source/per_cpu_sink (Suzuki).
> - Renamed spinlock name in syscfg (Suzuki).
> - Refactored paired enable and disable path with new patches
> 10 and 12 (Suzuki).
> - Link to v7: https://lore.kernel.org/r/20260320-arm_coresight_path_power_management_improvement-v7-0-327ddd36b58b@arm.com
>
> Changes in v7:
> - Added a flag in coresight_desc to indicate CPU bound device (Suzuki).
> - Used coresight_mutex to protect per-CPU source pointer (Suzuki).
> - Added a spinlock for exclusive access per-CPU source pointer (Suzuki).
> - Dropped .pm_is_needed() callback (Suzuki).
> - Supported range in path enabling / disabling (Suzuki).
> - Gathered test and review tags (Levi / James).
> - Link to v6: https://lore.kernel.org/r/20260305-arm_coresight_path_power_management_improvement-v6-0-eff765d211a9@arm.com
>
> Signed-off-by: Leo Yan <leo.yan at arm.com>
>
> ---
> Leo Yan (19):
> coresight: Extract device init into coresight_init_device()
> coresight: Populate CPU ID into coresight_device
> coresight: Remove .cpu_id() callback from source ops
> coresight: Take hotplug lock in enable_source_store() for Sysfs mode
> coresight: etm4x: Set per-CPU path on local CPU
> coresight: etm3x: Set per-CPU path on local CPU
> coresight: Register CPU PM notifier in core layer
> coresight: etm4x: Hook CPU PM callbacks
> coresight: etm4x: Remove redundant checks in PM save and restore
> coresight: syscfg: Use IRQ-safe spinlock to protect active variables
> coresight: Move source helper disabling to coresight_disable_path()
> coresight: Control path with range
> coresight: Use helpers to fetch first and last nodes
> coresight: Introduce coresight_enable_source() helper
> coresight: Control path during CPU idle
> coresight: Add PM callbacks for sink device
> coresight: sysfs: Increment refcount only for system tracers
> coresight: Move CPU hotplug callbacks to core layer
> coresight: sysfs: Validate CPU online status for per-CPU sources
>
> Yabin Cui (1):
> coresight: trbe: Save and restore state across CPU low power state
>
> drivers/hwtracing/coresight/coresight-catu.c | 2 +-
> drivers/hwtracing/coresight/coresight-core.c | 419 ++++++++++++++++++---
> drivers/hwtracing/coresight/coresight-cti-core.c | 9 +-
> drivers/hwtracing/coresight/coresight-etm-perf.c | 4 +-
> drivers/hwtracing/coresight/coresight-etm3x-core.c | 73 +---
> drivers/hwtracing/coresight/coresight-etm4x-core.c | 168 ++-------
> drivers/hwtracing/coresight/coresight-priv.h | 4 +
> drivers/hwtracing/coresight/coresight-syscfg.c | 35 +-
> drivers/hwtracing/coresight/coresight-syscfg.h | 2 +
> drivers/hwtracing/coresight/coresight-sysfs.c | 50 ++-
> drivers/hwtracing/coresight/coresight-trbe.c | 61 ++-
> include/linux/coresight.h | 13 +-
> include/linux/cpuhotplug.h | 2 +-
> 13 files changed, 566 insertions(+), 276 deletions(-)
> ---
> base-commit: ec687ba84000d7d50cf243558041f6729d1d8119
> change-id: 20251104-arm_coresight_path_power_management_improvement-dab4966f8280
>
> Best regards,
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