[PATCH v5 0/4] arm64: Work around C1-Pro erratum 4193714 (CVE-2026-0995)

Catalin Marinas catalin.marinas at arm.com
Fri Apr 10 11:47:21 PDT 2026


On Tue, 07 Apr 2026 11:28:40 +0100, Catalin Marinas wrote:
> That's version 5 of the C1-Pro workaround. Version 3 here:
> 
> https://lore.kernel.org/r/20260402101246.3870036-1-catalin.marinas@arm.com
> 
> Changes since v4:
> 
> - Static sme_dvmsync_cpus mask to avoid allocating under stop_machine().
>   Sashiko was right, even GFP_ATOMIC won't work under a raw_spin_lock()
> 
> [...]

Applied to arm64 (for-next/c1-pro-erratum-4193714). I won't push it to
Linus in the first round, waiting for a bit more testing from Will. If
all goes well, I'll send it in the second part of the merging window.

[1/4] arm64: tlb: Introduce __tlbi_sync_s1ish_{kernel,batch}() for TLB maintenance
      https://git.kernel.org/arm64/c/6bfbf574a391
[2/4] arm64: tlb: Pass the corresponding mm to __tlbi_sync_s1ish()
      https://git.kernel.org/arm64/c/d9fb08ba946a
[3/4] arm64: cputype: Add C1-Pro definitions
      https://git.kernel.org/arm64/c/2c99561016c5
[4/4] arm64: errata: Work around early CME DVMSync acknowledgement
      https://git.kernel.org/arm64/c/0baba94a9779



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