[PATCH v4 1/2] dt-bindings: perf: marvell: Add CN20K DDR PMU binding

[Geethasowjanya Akula]

>-----Original Message-----
>From: Krzysztof Kozlowski <krzk at kernel.org>
>Sent: Wednesday, April 8, 2026 12:39 PM
>To: Geethasowjanya Akula <gakula at marvell.com>
>Cc: linux-perf-users at vger.kernel.org; linux-kernel at vger.kernel.org; linux-arm-
>kernel at lists.infradead.org; devicetree at vger.kernel.org;
>mark.rutland at arm.com; will at kernel.org; krzk+dt at kernel.org
>Subject: [EXTERNAL] Re: [PATCH v4 1/2] dt-bindings: perf: marvell: Add CN20K
>DDR PMU binding
>On Tue, Apr 07, 2026 at 09:05:10PM +0530, Geetha sowjanya wrote:
>> Marvell CN20K SoCs integrate a DDR Performance Monitoring Unit (PMU)
>> associated with the DDR controller. The block provides hardware
>> counters to monitor DDR traffic and performance events and is accessed
>> via a dedicated MMIO region.
>>
>> The CN20K DDR PMU is functionally equivalent to the CN10K DDR PMU,
>> with minor register offset differences. This binding documents the
>> CN20K variant and introduces a specific compatible string to allow
>> software to distinguish between the two implementations.
>
>Drop last sentence, I already asked for that.
will drop the last sentence as requested in the next revision.
>
>>
>> Signed-off-by: Geetha sowjanya <gakula at marvell.com>
>> ---
>>  .../bindings/perf/marvell-cn20k-ddr-pmu.yaml  | 39
>> +++++++++++++++++++
>
>Still wrong filename.
Sorry for the confusion. The intended filename is: marvell,cn20k-ddr-pmu.yaml
>
>Best regards,
>Krzysztof