[PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable for dual mux

[Erim, Salih]

Hi, 

> -----Original Message-----
> From: Erim, Salih <Salih.Erim at amd.com>
> Sent: Wednesday, April 1, 2026 2:13 PM
> To: Simek, Michal <michal.simek at amd.com>; Jonathan Cameron
> <jic23 at kernel.org>; Christofer Jonason <christofer.jonason at guidelinegeo.com>;
> O'Griofa, Conall <conall.ogriofa at amd.com>
> Cc: lars at metafoo.de; dlechner at baylibre.com; nuno.sa at analog.com;
> andy at kernel.org; victor.jonsson at guidelinegeo.com; linux-iio at vger.kernel.org;
> linux-arm-kernel at lists.infradead.org; linux-kernel at vger.kernel.org;
> stable at vger.kernel.org
> Subject: RE: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable
> for dual mux
> 
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> 
> 
> [AMD Official Use Only - AMD Internal Distribution Only]

I am deeply sorry about these markings. Please try to ignore them, and I will do my best to escape from them.

> 
> Reviewed-by: Salih Erim <salih.erim at amd.com>
> 
> > -----Original Message-----
> > From: Erim, Salih
> > Sent: Wednesday, April 1, 2026 2:12 PM
> > To: Simek, Michal <michal.simek at amd.com>; Jonathan Cameron
> > <jic23 at kernel.org>; Christofer Jonason
> > <christofer.jonason at guidelinegeo.com>;
> > O'Griofa, Conall <conall.ogriofa at amd.com>
> > Cc: lars at metafoo.de; dlechner at baylibre.com; nuno.sa at analog.com;
> > andy at kernel.org; victor.jonsson at guidelinegeo.com;
> > linux-iio at vger.kernel.org; linux-arm-kernel at lists.infradead.org;
> > linux-kernel at vger.kernel.org; stable at vger.kernel.org
> > Subject: RE: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in
> > postdisable for dual mux
> >
> > Hi Christofer,
> >
> > The code change looks correct to me - it aligns postdisable with
> > preenable by reusing xadc_get_seq_mode(), and the scope is limited to
> > dual external mux configurations.
> >
> > Since this is targeting stable, could you please share what
> > hardware/board this was tested on and how you verified that VAUX[8-15]
> > channels return correct data with the fix applied?
> >
> > Reviewed-by: Salih Emin <salih.emin at amd.com>
> >
> > Thanks,
> > Salih
> >
> >
> > > -----Original Message-----
> > > From: Simek, Michal <michal.simek at amd.com>
> > > Sent: Tuesday, March 10, 2026 7:43 AM
> > > To: Jonathan Cameron <jic23 at kernel.org>; Christofer Jonason
> > > <christofer.jonason at guidelinegeo.com>; Erim, Salih
> > > <Salih.Erim at amd.com>; O'Griofa, Conall <conall.ogriofa at amd.com>
> > > Cc: lars at metafoo.de; dlechner at baylibre.com; nuno.sa at analog.com;
> > > andy at kernel.org; victor.jonsson at guidelinegeo.com;
> > > linux-iio at vger.kernel.org; linux-arm-kernel at lists.infradead.org;
> > > linux-kernel at vger.kernel.org; stable at vger.kernel.org
> > > Subject: Re: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in
> > > postdisable for dual mux
> > >
> > > +Salih, Conall,
> > >
> > > On 3/7/26 13:41, Jonathan Cameron wrote:
> > > > On Wed,  4 Mar 2026 10:07:27 +0100 Christofer Jonason
> > > > <christofer.jonason at guidelinegeo.com> wrote:
> > > >
> > > >> xadc_postdisable() unconditionally sets the sequencer to
> > > >> continuous mode. For dual external multiplexer configurations this is
> incorrect:
> > > >> simultaneous sampling mode is required so that ADC-A samples
> > > >> through the mux on VAUX[0-7] while ADC-B simultaneously samples
> > > >> through the mux on VAUX[8-15]. In continuous mode only ADC-A is
> > > >> active, so VAUX[8-15] channels return incorrect data.
> > > >>
> > > >> Since postdisable is also called from xadc_probe() to set the
> > > >> initial idle state, the wrong sequencer mode is active from the
> > > >> moment the driver loads.
> > > >>
> > > >> The preenable path already uses xadc_get_seq_mode() which returns
> > > >> SIMULTANEOUS for dual mux. Fix postdisable to do the same.
> > > >>
> > > >> Fixes: bdc8cda1d010 ("iio:adc: Add Xilinx XADC driver")
> > > >> Cc: stable at vger.kernel.org
> > > >> Signed-off-by: Christofer Jonason
> > > >> <christofer.jonason at guidelinegeo.com>
> > > >
> > > > I'll leave this on list for a little longer as I'd really like a
> > > > confirmation of this one from the AMD Xilinx folk.
> > >
> > > Salih/Conall: Please look at this patch and provide your comment or tag.
> > >
> > > Thanks,
> > > Michal

As I mentioned earlier, I have reviewed and it looks correct to me. 
It would be good if Christopher could share testing environment and results.

Reviewed-by: Salih Emin <salih.emin at amd.com>

Thanks, 
Salih.