[PATCH 10/12] arm64: dts: imx8qxp-mek: Add supports-clkreq property to PCIe M.2 port

Frank Li Frank.Li at nxp.com
Wed Oct 29 12:54:46 PDT 2025


From: Richard Zhu <hongxing.zhu at nxp.com>

According to PCIe r6.1, sec 5.5.1.

The following rules define how the L1.1 and L1.2 substates are entered:
Both the Upstream and Downstream Ports must monitor the logical state of
the CLKREQ# signal.

Typical implement is using open drain, which connect RC's clkreq# to
EP's clkreq# together and pull up clkreq#.

imx8qxp-mek matches this requirement, so add supports-clkreq to allow
PCIe device enter ASPM L1 Sub-State.

Signed-off-by: Richard Zhu <hongxing.zhu at nxp.com>
Signed-off-by: Frank Li <Frank.Li at nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
index 13c308d007fc0f991a5714d13a9162bdb499db2c..fc10710e4ca3e8472f32ba0beaadd27382ba756c 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
@@ -673,6 +673,7 @@ &pcie0 {
 	pinctrl-names = "default";
 	reset-gpios = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>;
 	vpcie-supply = <&reg_pcieb>;
+	supports-clkreq;
 	status = "okay";
 };
 

-- 
2.34.1




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