[PATCH v3 18/29] arm_mpam: Register and enable IRQs

Shaopeng Tan (Fujitsu) tan.shaopeng at fujitsu.com
Wed Oct 29 00:02:44 PDT 2025


> Register and enable error IRQs. All the MPAM error interrupts indicate a
> software bug, e.g. out of range partid. If the error interrupt is ever signalled,
> attempt to disable MPAM.
> 
> Only the irq handler accesses the MPAMF_ESR register, so no locking is
> needed. The work to disable MPAM after an error needs to happen at process
> context as it takes mutex. It also unregisters the interrupts, meaning it can't be
> done from the threaded part of a threaded interrupt.
> Instead, mpam_disable() gets scheduled.
> 
> Enabling the IRQs in the MSC may involve cross calling to a CPU that can
> access the MSC.
> 
> Once the IRQ is requested, the mpam_disable() path can be called
> asynchronously, which will walk structures sized by max_partid. Ensure this
> size is fixed before the interrupt is requested.
> 
> CC: Rohit Mathew <rohit.mathew at arm.com>
> Tested-by: Rohit Mathew <rohit.mathew at arm.com>
> Tested-by: Fenghua Yu <fenghuay at nvidia.com>
> Signed-off-by: James Morse <james.morse at arm.com>

Reviewed-by: Shaopeng Tan <tan.shaopeng at jp.fujitsu.com>



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