[PATCH mpam mpam/snapshot/v6.14-rc1] arm64/mpam: Fix MBWU monitor overflow handling

Ben Horgan ben.horgan at arm.com
Tue Oct 28 09:01:46 PDT 2025


Hi Zeng,

On 10/25/25 10:01, Zeng Heng wrote:
> Hi Ben,
> 
> On 2025/10/23 0:17, Ben Horgan wrote:
> 
>>> Signed-off-by: Zeng Heng <zengheng4 at huawei.com>
>>> ---
>>>   drivers/resctrl/mpam_devices.c | 8 +++++---
>>>   1 file changed, 5 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/
>>> mpam_devices.c
>>> index 0dd048279e02..06f3ec9887d2 100644
>>> --- a/drivers/resctrl/mpam_devices.c
>>> +++ b/drivers/resctrl/mpam_devices.c
>>> @@ -1101,7 +1101,8 @@ static void __ris_msmon_read(void *arg)
>>>       clean_msmon_ctl_val(&cur_ctl);
>>>       gen_msmon_ctl_flt_vals(m, &ctl_val, &flt_val);
>>>       config_mismatch = cur_flt != flt_val ||
>>> -              cur_ctl != (ctl_val | MSMON_CFG_x_CTL_EN);
>>> +             (cur_ctl & ~MSMON_CFG_x_CTL_OFLOW_STATUS) !=
>>> +             (ctl_val | MSMON_CFG_x_CTL_EN);
>>
>> This only considers 31 bit counters. I would expect any change here to
>> consider all lengths of counter.
> 
> Sorry, regardless of whether the counter is 32-bit or 64-bit, the
> config_mismatch logic should be handled the same way here. Am I
> wrong?

Yes, they should be handled the same way. However, the overflow status
bit for long counters is MSMON_CFG_MBWU_CTL_OFLOW_STATUS_L.

I now see that the existing code in the series has this covered.
Both the overflow bits are masked out in clean_msmon_ctl_val(). No need
for any additional masking.

> 
> Best Regards,
> Zeng Heng
> 
> 

Thanks,

Ben




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