[PATCH] perf: arm-spe: set the correct interval for PMSIRR_EL1

[Huang Shijie]

>From the spec, the "interval" value for PMSIRR_EL1 is in the [31, 8] bits.
Current code does not set it correctly.

This patch fixes it.

Fixes: d5d9696b03808 ("drivers/perf: Add support for ARMv8.2 Statistical Profiling Extension")
Signed-off-by: Huang Shijie <shijie at os.amperecomputing.com>
---
 drivers/perf/arm_spe_pmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/perf/arm_spe_pmu.c b/drivers/perf/arm_spe_pmu.c
index fa50645fedda..d424721b79ee 100644
--- a/drivers/perf/arm_spe_pmu.c
+++ b/drivers/perf/arm_spe_pmu.c
@@ -400,7 +400,7 @@ static u64 arm_spe_event_to_pmsirr(struct perf_event *event)
 	arm_spe_event_sanitise_period(event);
 
 	reg |= FIELD_PREP(PMSIRR_EL1_RND, ATTR_CFG_GET_FLD(attr, jitter));
-	reg |= event->hw.sample_period;
+	reg |= FIELD_PREP(PMSIRR_EL1_INTERVAL, event->hw.sample_period);
 
 	return reg;
 }
-- 
2.40.1