[PATCH v6 7/7] kselftest/arm64: Add HWCAP test for FEAT_{LS64, LS64_V}
Arnd Bergmann
arnd at arndb.de
Sun Oct 26 14:56:11 PDT 2025
On Sat, Oct 25, 2025, at 12:06, Zhou Wang wrote:
> On 2025/10/25 0:18, Arnd Bergmann wrote:
>> On Fri, Oct 24, 2025, at 11:08, Zhou Wang wrote:
>>> + register void *xn asm ("x8") = src;
>>> + register u64 xt_1 asm ("x0");
>>> + register u64 __maybe_unused xt_2 asm ("x1");
>>> + register u64 __maybe_unused xt_3 asm ("x2");
>>> + register u64 __maybe_unused xt_4 asm ("x3");
>>> + register u64 __maybe_unused xt_5 asm ("x4");
>>> + register u64 __maybe_unused xt_6 asm ("x5");
>>> + register u64 __maybe_unused xt_7 asm ("x6");
>>> + register u64 __maybe_unused xt_8 asm ("x7");
>>> +
>>> + /* LD64B x0, [x8] */
>>> + asm volatile(".inst 0xf83fd100" : "=r" (xt_1) : "r" (xn));
>>
>> Relying on the __maybe_unused register declaration seems a little
>> fragile, can you change this so that the inline asm specifies
>> all of the registers correctly as input/output arguments?
>
> Seems we can remove xt_2 ... xt8, but add x1 ... x7 to asm clobber list,
> something like:
>
> asm volatile(".inst 0xf83fd100" : "=r" (xt_1) : "r" (xn)
> : "x1", "x2", "x3", "x4", "x5", "x6", "x7");
I was thinking you'd define the function in a way that would
all arguments passed the way one would for a caller that
actually cares about them, but for the test case I guess
a clobber works just as well.
>>> +
>>> + /* ST64BV x9, x0, [x8] */
>>> + asm volatile(".inst 0xf829b100" : "=r" (st) : "r" (xt_1), "r" (xn));
>>> +
>>> + sigaction(SIGBUS, &old, NULL);
>>
>> Is ST64BV expected to cause SIGBUS here, or should it return the
>> 0xffffffffffffffff output to indicate an unsupported memory area?
>
> I think it should return 0xffffffffffffffff without an exception,
> will modify above test codes in next version.
Ok.
Arnd
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