[PATCH v2 2/8] dt-bindings: clock: document 8ULP's SIM LPAV
Peng Fan
peng.fan at oss.nxp.com
Wed Oct 22 07:08:41 PDT 2025
Hi Laurentiu,
On Fri, Oct 17, 2025 at 04:20:19AM -0700, Laurentiu Mihalcea wrote:
>From: Laurentiu Mihalcea <laurentiu.mihalcea at nxp.com>
>
>Add documentation for i.MX8ULP's SIM LPAV module.
>
>Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea at nxp.com>
>---
>+description:
>+ The i.MX8ULP LPAV subsystem contains a block control module known as
>+ SIM LPAV, which offers functionalities such as clock gating or reset
>+ line assertion/de-assertion.
>+
>+properties:
>+ compatible:
>+ const: fsl,imx8ulp-sim-lpav
This block also contains QoS registers, General purpose registers, HIFI
general purpose registers, and others.
I am not sure whether need to add a syscon fallback here. dt maintainer may
help comment.
Regards,
Peng
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