[GIT PULL] arm64 fixes for 6.18-rc2

[Catalin Marinas]

Hi Linus,

Please pull a couple of arm64 fixes below. Normally it's Will handling
the fixes this time around but he's fishing on some remote lake away
from the modern world (and internet connection). Thanks.

The following changes since commit 3a8660878839faadb4f1a6dd72c3179c1df56787:

  Linux 6.18-rc1 (2025-10-12 13:42:36 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux tags/arm64-fixes

for you to fetch changes up to ea0d55ae4b3207c33691a73da3443b1fd379f1d2:

  arm64: debug: always unmask interrupts in el0_softstp() (2025-10-17 18:08:05 +0100)

----------------------------------------------------------------
arm64 fixes:

 - Explicitly encode the XZR register if the value passed to
   write_sysreg_s() is 0. The GIC CDEOI instruction is encoded as a
   system register write with XZR as the source register. However, clang
   does not honour the "Z" register constraint, leading to incorrect
   code generation

 - Ensure the interrupts (DAIF.IF) are unmasked when completing
   single-step of a suspended breakpoint before calling
   exit_to_user_mode(). With pseudo-NMIs, interrupts are (additionally)
   masked at the PMR_EL1 register, handled by local_irq_*()

----------------------------------------------------------------
Ada Couprie Diaz (1):
      arm64: debug: always unmask interrupts in el0_softstp()

Lorenzo Pieralisi (1):
      arm64/sysreg: Fix GIC CDEOI instruction encoding

 arch/arm64/include/asm/sysreg.h  | 11 ++++++++++-
 arch/arm64/kernel/entry-common.c |  8 +++++---
 2 files changed, 15 insertions(+), 4 deletions(-)

-- 
Catalin