[PATCH 00/39] Add i.MX95 DPU/DSI/LVDS support

Marek Vasut marek.vasut at mailbox.org
Fri Oct 17 08:54:41 PDT 2025


On 10/15/25 12:09 PM, Liu Ying wrote:

Hello Liu,

>>> This has conflicts with my in-flight patch series for adding i.MX8QXP DC
>>> prefetch engine support(though i.MX95 SoC doesn't embed any display controller
>>> prefetch engine).  You probably want to take a look at it, just a heads up.
>>>
>>> https://lore.kernel.org/all/20250929-imx8-dc-prefetch-v3-0-c01d0608add2@nxp.com/
>>
>> Thank you for sharing that.
>>
>> Would it make sense to send 4 and 5 separately , so the fixes can land faster?
> 
> Maybe not, since there is no user(DT node is not enabled) so far.
> But I'd like to have more review/ack for that patch series(it's kind of
> hard to get sufficient review...).

I could test on the MX95 if we can somehow ... figure this out. Then I 
can provide RB/TB easily. I don't have MX8qxp device.

>> Also, could you please try and avoid the SCU dependency on patch 7 ,
>> and more in that direction , can the PRG be made a bit more optional, so the
> 
> Don't think there is any way to address them.
> 
>> iMX95 can still be supported by the DC driver ?
> 
> SCU dependency and PRG(even more other reasons) make me opt to separate
> modules for i.MX95/8qxp DCs.
SCU is only a register accessor, PRG is another block in the DC, I think 
those can be isolated. It seems the whole DC is a composition of 
multiple reusable blocks, so we can compose them for both MX8qxp and 
MX95 the right way and reuse most of the code, right ?



More information about the linux-arm-kernel mailing list