[PATCH 1/3] dt-bindings: gpu: img,powervr-rogue: Document GX6250 GPU in Renesas R-Car M3-W/M3-W+
Marek Vasut
marek.vasut at mailbox.org
Wed Oct 15 07:24:44 PDT 2025
On 10/15/25 12:52 PM, Matt Coster wrote:
Hello Matt,
>>>> - Clock ZGφ: Appears to be a core clock for the GPU (3DGE). That would
>>>> make it our "core" clock.
>>>
>>> This should be 600-700 MHz clock on M3-W , so that sounds like a GPU
>>> core clock.
>>
>> Agreed.
>>
>>>
>>>> - Clock S2D1φ: Appears to be a core clock used on the AXI bus, making
>>>> it our "sys" clock.
>>>
>>> This should be 400 MHz AXI clock, but wouldn't that make it "mem" clock
>>> ? I think this might be the clock which drives the AXI bus, used by the
>>> GPU to access data in DRAM ?
>>
>> Agreed.
>>
>>>> - MSTP ST112: Appears to be a whole module on/off control of some
>>>> description, and definitely doesn't align with the missing "mem"
>>>> clock.
>>>
>>> Maybe this is the "sys" clock, since it toggles the register interface
>>> clock on/off ?
>>
>> Probably.
>
> Yes, this is probably correct. I got my AXI interfaces mixed up – we
> have both a manager interface for accessing memory (using the mem clock)
> and a subordinate interface to expose to our registers (using the sys
> clock). Here's the summary table from our system integration document:
>
> +-------+-------------------------+------------------------+
> | Clock | Modules Clocked | Dependencies |
> +-------+-------------------------+------------------------+
> | mem | SLC / AXI Manager | Run for all operations |
> | sys | SOCIF / AXI Subordinate | Run for all operations |
> | core | All | Run for all operations |
> +-------+-------------------------+------------------------+
Thank you for sharing that. I will send a V2 series shortly.
--
Best regards,
Marek Vasut
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