[PATCH 36/39] drm/bridge: fsl-ldb: Add i.MX95 support

[Marek Vasut]

Add support for i.MX95 SoC variant of the LDB. This variant supports
single channel and all configuration is done via single register,
but there are two instances of this IP preceded by another bridge,
which handles the dual-lane configuration instead. This is also the
reason for special-case handling of input format, where the preceding
bridge needs the format details as well.

Signed-off-by: Marek Vasut <marek.vasut at mailbox.org>
---
Cc: Abel Vesa <abelvesa at kernel.org>
Cc: Conor Dooley <conor+dt at kernel.org>
Cc: Fabio Estevam <festevam at gmail.com>
Cc: Krzysztof Kozlowski <krzk+dt at kernel.org>
Cc: Laurent Pinchart <Laurent.pinchart at ideasonboard.com>
Cc: Liu Ying <victor.liu at nxp.com>
Cc: Lucas Stach <l.stach at pengutronix.de>
Cc: Peng Fan <peng.fan at nxp.com>
Cc: Pengutronix Kernel Team <kernel at pengutronix.de>
Cc: Rob Herring <robh at kernel.org>
Cc: Shawn Guo <shawnguo at kernel.org>
Cc: Thomas Zimmermann <tzimmermann at suse.de>
Cc: devicetree at vger.kernel.org
Cc: dri-devel at lists.freedesktop.org
Cc: imx at lists.linux.dev
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-clk at vger.kernel.org
---
 drivers/gpu/drm/bridge/fsl-ldb.c | 23 +++++++++++++++++++----
 1 file changed, 19 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/bridge/fsl-ldb.c b/drivers/gpu/drm/bridge/fsl-ldb.c
index c54caea0b63fc..1560438e4cb10 100644
--- a/drivers/gpu/drm/bridge/fsl-ldb.c
+++ b/drivers/gpu/drm/bridge/fsl-ldb.c
@@ -58,6 +58,7 @@ enum fsl_ldb_devtype {
 	IMX6SX_LDB,
 	IMX8MP_LDB,
 	IMX93_LDB,
+	IMX95_LDB,
 };
 
 struct fsl_ldb_devdata {
@@ -73,6 +74,9 @@ static const struct fsl_ldb_devdata fsl_ldb_devdata[] = {
 	[IMX93_LDB] = {
 		.lvds_en_bit = true,
 	},
+	[IMX95_LDB] = {
+		.lvds_en_bit = true,
+	},
 };
 
 struct fsl_ldb {
@@ -235,7 +239,7 @@ static void fsl_ldb_atomic_disable(struct drm_bridge *bridge,
 	clk_disable_unprepare(fsl_ldb->clk);
 }
 
-#define MAX_INPUT_SEL_FORMATS 1
+#define MAX_INPUT_SEL_FORMATS 4
 static u32 *
 fsl_ldb_atomic_get_input_bus_fmts(struct drm_bridge *bridge,
 				  struct drm_bridge_state *bridge_state,
@@ -244,17 +248,26 @@ fsl_ldb_atomic_get_input_bus_fmts(struct drm_bridge *bridge,
 				  u32 output_fmt,
 				  unsigned int *num_input_fmts)
 {
+	struct fsl_ldb *fsl_ldb = to_fsl_ldb(bridge);
 	u32 *input_fmts;
 
 	*num_input_fmts = 0;
 
-	input_fmts = kcalloc(MAX_INPUT_SEL_FORMATS, sizeof(*input_fmts),
+	input_fmts = kcalloc(MAX_INPUT_SEL_FORMATS, MAX_INPUT_SEL_FORMATS * sizeof(*input_fmts),
 			     GFP_KERNEL);
 	if (!input_fmts)
 		return NULL;
 
-	input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24;
-	*num_input_fmts = MAX_INPUT_SEL_FORMATS;
+	if (of_device_is_compatible(fsl_ldb->dev->of_node, "fsl,imx95-ldb")) {
+		input_fmts[0] = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG;
+		input_fmts[1] = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG;
+		input_fmts[2] = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA;
+		input_fmts[3] = MEDIA_BUS_FMT_FIXED;
+		*num_input_fmts = 4;
+	} else {
+		input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24;
+		*num_input_fmts = 1;
+	}
 
 	return input_fmts;
 }
@@ -396,6 +409,8 @@ static const struct of_device_id fsl_ldb_match[] = {
 	  .data = &fsl_ldb_devdata[IMX8MP_LDB], },
 	{ .compatible = "fsl,imx93-ldb",
 	  .data = &fsl_ldb_devdata[IMX93_LDB], },
+	{ .compatible = "fsl,imx95-ldb",
+	  .data = &fsl_ldb_devdata[IMX95_LDB], },
 	{ /* sentinel */ },
 };
 MODULE_DEVICE_TABLE(of, fsl_ldb_match);
-- 
2.51.0