[PATCH v2 18/29] arm_mpam: Register and enable IRQs
James Morse
james.morse at arm.com
Fri Oct 3 11:03:12 PDT 2025
Hi Fenghua,
On 25/09/2025 07:33, Fenghua Yu wrote:
> On 9/10/25 13:42, James Morse wrote:
>> Register and enable error IRQs. All the MPAM error interrupts indicate a
>> software bug, e.g. out of range partid. If the error interrupt is ever
>> signalled, attempt to disable MPAM.
>>
>> Only the irq handler accesses the ESR register, so no locking is needed.
>> The work to disable MPAM after an error needs to happen at process
>> context as it takes mutex. It also unregisters the interrupts, meaning
>> it can't be done from the threaded part of a threaded interrupt.
>> Instead, mpam_disable() gets scheduled.
>>
>> Enabling the IRQs in the MSC may involve cross calling to a CPU that
>> can access the MSC.
>>
>> Once the IRQ is requested, the mpam_disable() path can be called
>> asynchronously, which will walk structures sized by max_partid. Ensure
>> this size is fixed before the interrupt is requested.
>> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
>> index a9d3c4b09976..e7e4afc1ea95 100644
>> --- a/drivers/resctrl/mpam_devices.c
>> +++ b/drivers/resctrl/mpam_devices.c
>> @@ -1318,11 +1405,172 @@ static void mpam_enable_merge_features(struct list_head
>> +static void mpam_unregister_irqs(void)
>> +{
>> + int irq, idx;
>> + struct mpam_msc *msc;
>> +
>> + cpus_read_lock();
>> + /* take the lock as free_irq() can sleep */
>> + idx = srcu_read_lock(&mpam_srcu);
> guard(srcu)(&mpam_srcu);
Yes - Jonathan already suggested this.
>> + list_for_each_entry_srcu(msc, &mpam_all_msc, all_msc_list,
>> + srcu_read_lock_held(&mpam_srcu)) {
>> + irq = platform_get_irq_byname_optional(msc->pdev, "error");
>> + if (irq <= 0)
>> + continue;
>> +
>> + if (test_and_clear_bit(MPAM_ERROR_IRQ_HW_ENABLED, &msc->error_irq_flags))
>> + mpam_touch_msc(msc, mpam_disable_msc_ecr, msc);
>> +
>> + if (test_and_clear_bit(MPAM_ERROR_IRQ_REQUESTED, &msc->error_irq_flags)) {
>> + if (irq_is_percpu(irq)) {
>> + msc->reenable_error_ppi = 0;
>> + free_percpu_irq(irq, msc->error_dev_id);
>> + } else {
>> + devm_free_irq(&msc->pdev->dev, irq, msc);
>> + }
>> + }
>> + }
>> + srcu_read_unlock(&mpam_srcu, idx);
>> + cpus_read_unlock();
>> +}
James
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