[PATCH v3 19/31] coresight: cti: Introduce CS_MODE_DEBUG mode

Leo Yan leo.yan at arm.com
Fri Oct 3 06:59:46 PDT 2025


On Thu, Oct 02, 2025 at 11:31:52AM +0100, Mike Leach wrote:
> Hi,
> 
> On Mon, 15 Sept 2025 at 11:34, Leo Yan <leo.yan at arm.com> wrote:
> >
> > Introduce a new CS_MODE_DEBUG mode to indicate that a device is being
> > used for debugging purposes, e.g, if a system enables CTI for debugging
> > but not for hardware trace
> >
> 
> How can you know why the CTI is being enabled?

Depend on which CTI enablement path is invoked.

> System CTIs are attached to key HW trace infrastucture such as input
> triggers for ETR/ETB that have direct effect on trace.
> CoreCTIs, while they have some debug triggers, can also trigger ETM events.

Seems to me, it is no matter system CTIs or Core CTIs. Here, I am trying
to distinguish three methods for enabling CTI:

  (1) Enable CTI within a perf session.
  (2) Enable CTI within a sysfs session.
  (3) Enable CTI using the CTI driver's sysfs knob(s).

Currently, methods (2) and (3) are both using CS_MODE_SYSFS.

Method (2) enables a CTI device when we enable a source-to-sink path
via the sysfs interface; CTI acts as a helper in this case.

Since the CTI driver also provides its own sysfs knobs to enable the
CTI device by itself (defined in coresight-cti-sysfs.c), to
distinguish this from method (2), this patch introduces CS_MODE_DEBUG.

Thanks,
Leo



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