[PATCH 3/4] KVM: arm64: nv: Don't mask VTCR_EL2.HA if FEAT_HAFDBS is present
Oliver Upton
oupton at kernel.org
Fri Nov 28 10:48:10 PST 2025
On Fri, Nov 28, 2025 at 03:46:44PM +0000, Marc Zyngier wrote:
> On Fri, 28 Nov 2025 10:09:45 +0000,
> Alexandru Elisei <alexandru.elisei at arm.com> wrote:
> >
> > Commit 39db933ba67f ("KVM: arm64: nv: Implement HW access flag management
> > in stage-2 SW PTW") added support for hardware updates to the access flag
> > to stage 2 if the feature is available to the virtual machine, but forgot
> > to remove the VTCR_EL2.HA bit from the res0 mask for the register. Remove
> > it from the mask to allow the VM to use the feature.
> >
> > Fixes: 39db933ba67f ("KVM: arm64: nv: Implement HW access flag management in stage-2 SW PTW")
> > Signed-off-by: Alexandru Elisei <alexandru.elisei at arm.com>
> > ---
> > arch/arm64/kvm/nested.c | 4 +++-
> > 1 file changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c
> > index 911fc99ed99d..7a34163f6c68 100644
> > --- a/arch/arm64/kvm/nested.c
> > +++ b/arch/arm64/kvm/nested.c
> > @@ -1719,7 +1719,9 @@ int kvm_init_nv_sysregs(struct kvm_vcpu *vcpu)
> > set_sysreg_masks(kvm, VTTBR_EL2, res0, res1);
> >
> > /* VTCR_EL2 */
> > - res0 = GENMASK(63, 32) | GENMASK(30, 20);
> > + res0 = GENMASK(63, 32) | GENMASK(30, 22) | BIT(20);
> > + if (!kvm_has_feat(kvm, ID_AA64MMFR1_EL1, HAFDBS, AF))
> > + res0 |= VTCR_EL2_HA;
> > res1 = BIT(31);
> > set_sysreg_masks(kvm, VTCR_EL2, res0, res1);
> >
>
> The fix is correct, but I really do not want to add more of these
> tedious checks, one after the other. We should fix this once and for
> all by converting VTCR_EL2 to the feature dependency infrastructure
> and be done with it.
>
> I've pushed a small series at [1] that does that (very lightly
> tested).
This looks alright to me, do you want to post it?
Thanks,
Oliver
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