[PATCH 4/4] KVM: arm64: at: Update AF on software walk only if VM has FEAT_HAFDBS
Marc Zyngier
maz at kernel.org
Fri Nov 28 07:51:31 PST 2025
On Fri, 28 Nov 2025 10:09:46 +0000,
Alexandru Elisei <alexandru.elisei at arm.com> wrote:
>
> A guest can write 1 to TCR_ELx.HA, making the KVM software walker update
> the access flag in a table descriptor even if FEAT_HAFDBS is not present.
> Avoid this by making wi->ha depend on FEAT_HAFDBS being enabled in the VM,
> similar to how the software walker treats FEAT_HPDS.
>
> This is not needed for VTCR_EL2.HA, since a guest will always write to
> the in-memory copy of the register, where the HA bit is masked (set to
> 0) by KVM if the VM doesn't have FEAT_HAFDBS.
>
> Fixes: c59ca4b5b0c3 ("KVM: arm64: Implement HW access flag management in stage-1 SW PTW")
> Signed-off-by: Alexandru Elisei <alexandru.elisei at arm.com>
> ---
> arch/arm64/kvm/at.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/kvm/at.c b/arch/arm64/kvm/at.c
> index 6d41a95f6c60..53bf70126f81 100644
> --- a/arch/arm64/kvm/at.c
> +++ b/arch/arm64/kvm/at.c
> @@ -346,7 +346,8 @@ static int setup_s1_walk(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,
>
> wi->baddr &= GENMASK_ULL(wi->max_oa_bits - 1, x);
>
> - wi->ha = (wi->regime == TR_EL2 ?
> + wi->ha = kvm_has_feat(vcpu->kvm, ID_AA64MMFR1_EL1, HAFDBS, AF);
> + wi->ha &= (wi->regime == TR_EL2 ?
> FIELD_GET(TCR_EL2_HA, tcr) :
> FIELD_GET(TCR_HA, tcr));
This is yet another case where we should expand the sanitisation
infrastructure to cover the TCR registers.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
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