[PATCH 5/6] spi: imx: support dynamic burst length for ECSPI DMA mode

[Marc Kleine-Budde]

On 26.11.2025 11:17:41, Carlos Song wrote:
>
>
> > -----Original Message-----
> > From: Marc Kleine-Budde <mkl at pengutronix.de>
> > Sent: Wednesday, November 26, 2025 4:31 PM
> > To: Carlos Song <carlos.song at nxp.com>
> > Cc: broonie at kernel.org; Frank Li <frank.li at nxp.com>; hawnguo at kernel.org;
> > s.hauer at pengutronix.de; kernel at pengutronix.de; festevam at gmail.com;
> > imx at lists.linux.dev; linux-kernel at vger.kernel.org;
> > linux-arm-kernel at lists.infradead.org; linux-spi at vger.kernel.org
> > Subject: [EXT] Re: [PATCH 5/6] spi: imx: support dynamic burst length for ECSPI
> > DMA mode
> >
> > On 26.11.2025 07:42:36, Carlos Song wrote:
> >
> > [...]
> > > For example len is 512 *3 + 511. So first transfer using BURST_LENGTH
> > > = 512 bytes(auto update 3 times), DMA transfer len = 512 *3, second
> > > package BURST_LENGTH = 511 bytes, DMA transfer len = 511.(If here we
> > > use 512 bytes as BURST_LENGTH, SPI will shift out/in extra bits, it
> > > previous isn't acceptable!)
> >
> > What happens if you keep the Burst Length at 512 and only transfer 511 bytes
> > with the DMA engine?
> >
>
> Sorry for missing one question:
> BURST_LENGTH = 511, ECSPI will shift out 511 bytes in bus.
> BURST_LENGTH = 512, ECSPI will shift out the last one word all bit in 32 bits FIFO.
> So ECSPI will shift out 512 bytes include 8-bits zero bytes in bus.

Why was the tail transfer not needed before your patch?

Is because you configure buswidth to DMA_SLAVE_BUSWIDTH_4_BYTES
unconditionally on !word_delay mode. What happens if you always use
DMA_SLAVE_BUSWIDTH_1_BYTES?

Marc

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