PRI support in arm-smmu-v3 driver

[Pavan Kondeti]

Hi

I am trying to understand IO fault handling in Linux w/ SMMUv3. While reading
the code, I understand that SVA domain creation allows taking IO pagefaults.
arm_smmu_enable_iopf() checks if the master support stall upon fault
feature or not. How do we handle page faults for PCIe devices, for which 
transactions cannot safely be stalled? IIUC, The PRI handling in the
driver i.e arm_smmu_priq_thread()->arm_smmu_handle_ppr() is not doing
anything. In the SVA support for SMMUv3 series v7, I see the support for
PRI via "Add support for PRI" patch [1] but it is not merged. 

Can you please clarify if we can support SVA with PCIe devices w/o
pinning the memory?

[1]
https://lore.kernel.org/all/20200519175502.2504091-25-jean-philippe@linaro.org/

Thansk,
Pavan