[PATCH v2 29/45] KVM: arm64: GICv3: Set ICH_HCR_EL2.TDIR when interrupts overflow LR capacity

[Mark Brown]

On Fri, Nov 14, 2025 at 03:02:32PM +0000, Marc Zyngier wrote:
> Fuad Tabba <tabba at google.com> wrote:
> > On Sun, 9 Nov 2025 at 17:17, Marc Zyngier <maz at kernel.org> wrote:

> > > +       /*
> > > +        * Note that we set the trap irrespective of EOIMode, as that
> > > +        * can change behind our back without any warning...
> > > +        */
> > > +       if (irqs_active_outside_lrs(als))
> > > +               cpuif->vgic_hcr |= ICH_HCR_EL2_TDIR;
> > >  }

> > I just tested these patches as they are on kvmarm/next
> > 2ea7215187c5759fc5d277280e3095b350ca6a50 ("Merge branch
> > 'kvm-arm64/vgic-lr-overflow' into kvmarm/next"), without any
> > additional pKVM patches. I tried running it with pKVM (non-protected)
> > and with just plain nVHE. In both cases, I get a trap to EL2 (0x18)
> > when booting a non-protected guest, which triggers a bug in
> > handle_trap() arch/arm64/kvm/hyp/nvhe/hyp-main.c:706

> > This trap is happening because of setting this particular trap (TDIR).
> > Just removing this trap from vgic_v3_configure_hcr() from the ToT on
> > kvmarm/next boots fine.

> This is surprising, as I'm not hitting this on actual HW. Are you
> getting a 0x18 trap? If so, is it coming from the host? Can you
> correlate the PC with what the host is doing?

FWIW I am seeing this on i.MX8MP (4xA53+GICv3):

  https://lava.sirena.org.uk/scheduler/job/2118713#L1044
 
I'm also seeing boot failures on AM625 in pKVM mode but much earlier,
before any console output, so there's some confounding issue in that
case (non-pKVM boots on the platform seemed fine, I'll investigate if
it's still a problem in today's -next).
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