[PATCH v8 0/2] Add Google Tensor SoC USB controller support

[Greg Kroah-Hartman]

On Sat, Nov 22, 2025 at 09:32:04AM +0000, Roy Luo wrote:
> This series introduces USB controller support for the Google Tensor G5
> SoC (codename: Laguna), a new generation of Google silicon first
> launched with Pixel 10 devices.
> 
> The Tensor G5 represents a significant architectural overhaul compared
> to previous Tensor generations (e.g., gs101), which were based on Samsung
> Exynos IP. Although the G5 still utilizes Synopsys IP for the USB
> components, the custom top-level integration introduces a completely new
> design for clock, reset scheme, register interfaces and programming
> sequence, necessitating new drivers and device tree bindings.
> 
> The USB subsystem on Tensor G5 integrates a Synopsys DWC3 USB 3.1
> DRD-Single Port controller with hibernation support, and a custom PHY
> block comprising Synopsys eUSB2 and USB 3.2/DP combo PHYs. The PHY
> support is sent as a separate patch series.
> 
> Co-developed-by: Joy Chakraborty <joychakr at google.com>
> Signed-off-by: Joy Chakraborty <joychakr at google.com>
> Co-developed-by: Naveen Kumar <mnkumar at google.com>
> Signed-off-by: Naveen Kumar <mnkumar at google.com>
> Signed-off-by: Roy Luo <royluo at google.com>
> ---
> Changes in v8:
> - Add COMPILE_TEST to dependencies for build coverage.

Nope, that didn't work :(