[PATCH] phy: exynos5-usbdrd: fix clock prepare imbalance

[Vinod Koul]

On Mon, 06 Oct 2025 09:07:12 +0100, André Draszik wrote:
> Commit f4fb9c4d7f94 ("phy: exynos5-usbdrd: allow DWC3 runtime suspend
> with UDC bound (E850+)") incorrectly added clk_bulk_disable() as the
> inverse of clk_bulk_prepare_enable() while it should have of course
> used clk_bulk_disable_unprepare(). This means incorrect reference
> counts to the CMU driver remain.
> 
> Update the code accordingly.
> 
> [...]

Applied, thanks!

[1/1] phy: exynos5-usbdrd: fix clock prepare imbalance
      commit: 5e428e45bf17a8f3784099ca5ded16e3b5d59766

Best regards,
-- 
~Vinod