[PATCH v5 06/13] coresight: Interpret ETMv3 config with ATTR_CFG_GET_FLD()

[Mike Leach]

On Tue, 18 Nov 2025 at 16:28, James Clark <james.clark at linaro.org> wrote:
>
> Currently we're programming attr->config directly into ETMCR after some
> validation. This obscures which fields are being used, and also makes it
> impossible to move fields around or use other configN fields in the
> future.
>
> Improve it by only reading the fields that are valid and then setting
> the appropriate ETMCR bits based on each one.
>
> The ETMCR_CTXID_SIZE part can be removed as it was never a valid option
> because it's not in ETM3X_SUPPORTED_OPTIONS.
>
> Reviewed-by: Leo Yan <leo.yan at arm.com>
> Signed-off-by: James Clark <james.clark at linaro.org>
> ---
>  drivers/hwtracing/coresight/coresight-etm3x-core.c | 24 ++++++++++++----------
>  1 file changed, 13 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm3x-core.c b/drivers/hwtracing/coresight/coresight-etm3x-core.c
> index a5e809589d3e..4511fc2f8d72 100644
> --- a/drivers/hwtracing/coresight/coresight-etm3x-core.c
> +++ b/drivers/hwtracing/coresight/coresight-etm3x-core.c
> @@ -28,6 +28,7 @@
>  #include <linux/uaccess.h>
>  #include <linux/clk.h>
>  #include <linux/perf_event.h>
> +#include <linux/perf/arm_pmu.h>
>  #include <asm/sections.h>
>
>  #include "coresight-etm.h"
> @@ -339,21 +340,22 @@ static int etm_parse_event_config(struct etm_drvdata *drvdata,
>         if (attr->config & ~ETM3X_SUPPORTED_OPTIONS)
>                 return -EINVAL;
>
> -       config->ctrl = attr->config;
> +       config->ctrl = 0;
>
> -       /* Don't trace contextID when runs in non-root PID namespace */
> -       if (!task_is_in_init_pid_ns(current))
> -               config->ctrl &= ~ETMCR_CTXID_SIZE;
> +       if (ATTR_CFG_GET_FLD(attr, cycacc))
> +               config->ctrl |= ETMCR_CYC_ACC;
> +
> +       if (ATTR_CFG_GET_FLD(attr, timestamp))
> +               config->ctrl |= ETMCR_TIMESTAMP_EN;
>
>         /*
> -        * Possible to have cores with PTM (supports ret stack) and ETM
> -        * (never has ret stack) on the same SoC. So if we have a request
> -        * for return stack that can't be honoured on this core then
> -        * clear the bit - trace will still continue normally
> +        * Possible to have cores with PTM (supports ret stack) and ETM (never
> +        * has ret stack) on the same SoC. So only enable when it can be honored
> +        * - trace will still continue normally otherwise.
>          */
> -       if ((config->ctrl & ETMCR_RETURN_STACK) &&
> -           !(drvdata->etmccer & ETMCCER_RETSTACK))
> -               config->ctrl &= ~ETMCR_RETURN_STACK;
> +       if (ATTR_CFG_GET_FLD(attr, retstack) &&
> +           (drvdata->etmccer & ETMCCER_RETSTACK))
> +               config->ctrl |= ETMCR_RETURN_STACK;
>
>         return 0;
>  }
>
> --
> 2.34.1
>

Reviewed-by: Mike Leach <mike.leach at linaro.org>
-- 
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK