[PATCH 4/4] arm64: dts: imx95: fix hsio_blk_ctl reg map

[Krzysztof Kozlowski]

On Tue, Nov 18, 2025 at 03:40:55PM +0800, Xu Yang wrote:
> The HSIO block control register map should be 0x4c010000~0x4c01FFFF.
> Correct the start address and set length to 0x100 for available
> registers.
> 
> Fixes: 3c8d7b5d2bed ("arm64: dts: imx95: add ref clock for pcie nodes")
> Cc: stable at vger.kernel.org
> Signed-off-by: Xu Yang <xu.yang_2 at nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx95.dtsi | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index 1292677cbe4e..21c9df445be0 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -1774,9 +1774,9 @@ usb3_dwc3: usb at 4c100000 {
>  			};
>  		};
>  
> -		hsio_blk_ctl: syscon at 4c0100c0 {
> +		hsio_blk_ctl: syscon at 4c010000 {
>  			compatible = "nxp,imx95-hsio-blk-ctl", "syscon";
> -			reg = <0x0 0x4c0100c0 0x0 0x1>;
> +			reg = <0x0 0x4c010000 0x0 0x100>;
>  			#clock-cells = <1>;
>  			clocks = <&clk_sys100m>;
>  			power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
> @@ -1844,7 +1844,7 @@ pcie0: pcie at 4c300000 {
>  				 <&scmi_clk IMX95_CLK_HSIOPLL>,
>  				 <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
>  				 <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
> -				 <&hsio_blk_ctl 0>;
> +				 <&hsio_blk_ctl IMX95_CLK_HSIOMIX_PCIE_CLK_GATE>;

This is unrelated change, nothing explained in commit msg. Please do not
combine independent changes into one commit. Non-fixes with
fixes either

Best regards,
Krzysztof