[PATCH v5 21/34] arm_mpam: Register and enable IRQs

[Fenghua Yu]

On 11/17/25 09:00, Ben Horgan wrote:
> From: James Morse <james.morse at arm.com>
> 
> Register and enable error IRQs. All the MPAM error interrupts indicate a
> software bug, e.g. out of range partid. If the error interrupt is ever
> signalled, attempt to disable MPAM.
> 
> Only the irq handler accesses the MPAMF_ESR register, so no locking is
> needed. The work to disable MPAM after an error needs to happen at process
> context as it takes mutex. It also unregisters the interrupts, meaning
> it can't be done from the threaded part of a threaded interrupt.
> Instead, mpam_disable() gets scheduled.
> 
> Enabling the IRQs in the MSC may involve cross calling to a CPU that
> can access the MSC.
> 
> Once the IRQ is requested, the mpam_disable() path can be called
> asynchronously, which will walk structures sized by max_partid. Ensure
> this size is fixed before the interrupt is requested.
> 
> CC: Rohit Mathew <rohit.mathew at arm.com>
> Reviewed-by: Jonathan Cameron <jonathan.cameron at huawei.com>
> Reviewed-by: Gavin Shan <gshan at redhat.com>
> Tested-by: Rohit Mathew <rohit.mathew at arm.com>
> Tested-by: Fenghua Yu <fenghuay at nvidia.com>
> Tested-by: Shaopeng Tan <tan.shaopeng at jp.fujitsu.com>
> Tested-by: Peter Newman <peternewman at google.com>
> Tested-by: Carl Worth <carl at os.amperecomputing.com>
> Tested-by: Gavin Shan <gshan at redhat.com>
> Tested-by: Zeng Heng <zengheng4 at huawei.com>
> Signed-off-by: James Morse <james.morse at arm.com>
> Signed-off-by: Ben Horgan <ben.horgan at arm.com>

Reviewed-by: Fenghua Yu <fenghuay at nvidia.com>

Thanks.

-Fenghua