[PATCH v2 2/2] spi: add driver for NXP XSPI controller
Marc Kleine-Budde
mkl at pengutronix.de
Mon Nov 17 06:47:10 PST 2025
On 17.11.2025 19:04:25, Haibo Chen wrote:
> Add driver support for NXP XSPI controller.
>
> XSPI is a flexsible SPI host controller which supports up to
^
typo: flexible
> 2 external devices (2 CS). It support Single/Dual/Quad/Octal
> mode data transfer.
>
> The difference between XSPI and Flexspi:
> 1.the register layout is total different.
> 2.XSPI support multiple independent execution environments
> (EENVs) for HW virtualization with some limitations. Each EENV
> has its own interrupt and its own set of programming registers
> that exists in a specific offset range in the XSPI memory map.
> The main environment (EENV0) address space contains all of the
> registers for controlling EENV0 plus all of the general XSPI
> control and programming registers. The register mnemonics for
> the user environments (EENV1 to EENV4) have "_SUB_n" appended
> to the mnemonic for the corresponding main-environment register.
>
> Current driver based on EENV0, which means system already give
> EENV0 right to linux.
>
> This driver use SPI memory interface of the SPI framework to issue
> flash memory operations. Tested this driver with mtd_debug and
> UBIFS on NXP i.MX943 EVK board which has one MT35XU512ABA spi nor
> flash. NOw this driver has the following key features:
> - Support up to OCT DDR mode
> - Support AHB read
> - Support IP read and IP write
> - Support two CS
>
> Signed-off-by: Haibo Chen <haibo.chen at nxp.com>
> ---
> MAINTAINERS | 1 +
> drivers/spi/Kconfig | 10 +
> drivers/spi/Makefile | 1 +
> drivers/spi/spi-nxp-xspi.c | 1365 ++++++++++++++++++++++++++++++++++++++++++++
> 4 files changed, 1377 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 8a6ce2fdd6e46e94f8a1631cd0bf8b12980a64ed..bd54eb903a71db2fb4c6f798079cb04bbd9eb7bc 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -18708,6 +18708,7 @@ L: linux-spi at vger.kernel.org
> L: imx at lists.linux.dev
> S: Maintained
> F: Documentation/devicetree/bindings/spi/nxp,imx94-xspi.yaml
> +F: drivers/spi/spi-nxp-xspi.c
>
> NXP FXAS21002C DRIVER
> M: Rui Miguel Silva <rmfrfs at gmail.com>
> diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
> index 592d46c9998bbb8bef2b25d828b7f25c5c0ce180..db3dd4f0fb60142477799a1698387ae7dced638c 100644
> --- a/drivers/spi/Kconfig
> +++ b/drivers/spi/Kconfig
> @@ -481,6 +481,16 @@ config SPI_NXP_FLEXSPI
> This controller does not support generic SPI messages and only
> supports the high-level SPI memory interface.
>
> +config SPI_NXP_XSPI
> + tristate "NXP xSPI controller"
> + depends on ARCH_MXC || COMPILE_TEST
> + depends on HAS_IOMEM
> + help
> + This enables support for the xSPI controller. Up to two devices
> + can be connected to one host.
> + This controller does not support generic SPI messages and only
> + supports the high-level SPI memory interface.
> +
> config SPI_GPIO
> tristate "GPIO-based bitbanging SPI Master"
> depends on GPIOLIB || COMPILE_TEST
> diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
> index 8ff74a13faaa88399723f9e944f9198076c3e543..9323ba633780daadcce2b04f5492ae0647259211 100644
> --- a/drivers/spi/Makefile
> +++ b/drivers/spi/Makefile
> @@ -101,6 +101,7 @@ obj-$(CONFIG_SPI_WPCM_FIU) += spi-wpcm-fiu.o
> obj-$(CONFIG_SPI_NPCM_FIU) += spi-npcm-fiu.o
> obj-$(CONFIG_SPI_NPCM_PSPI) += spi-npcm-pspi.o
> obj-$(CONFIG_SPI_NXP_FLEXSPI) += spi-nxp-fspi.o
> +obj-$(CONFIG_SPI_NXP_XSPI) += spi-nxp-xspi.o
> obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o
> spi-octeon-objs := spi-cavium.o spi-cavium-octeon.o
> obj-$(CONFIG_SPI_OCTEON) += spi-octeon.o
> diff --git a/drivers/spi/spi-nxp-xspi.c b/drivers/spi/spi-nxp-xspi.c
> new file mode 100644
> index 0000000000000000000000000000000000000000..a7352e5e27b76d23c24ea766b9a616d8293bceac
> --- /dev/null
> +++ b/drivers/spi/spi-nxp-xspi.c
> @@ -0,0 +1,1365 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +
> +/*
> + * NXP xSPI controller driver.
> + *
> + * Copyright 2025 NXP
> + *
> + * xSPI is a flexsible SPI host controller which supports single
^
typo: flexible
> + * external devices. This device can have up to eight bidirectional
> + * data lines, this means xSPI support Single/Dual/Quad/Octal mode
> + * data transfer (1/2/4/8 bidirectional data lines).
> + *
> + * xSPI controller is driven by the LUT(Look-up Table) registers
> + * LUT registers are a look-up-table for sequences of instructions.
> + * A valid sequence consists of five LUT registers.
> + * Maximum 16 LUT sequences can be programmed simultaneously.
> + *
> + * LUTs are being created at run-time based on the commands passed
> + * from the spi-mem framework, thus using single LUT index.
> + *
> + * Software triggered Flash read/write access by IP Bus.
> + *
> + * Memory mapped read access by AHB Bus.
> + *
> + * Based on SPI MEM interface and spi-nxp-fspi.c driver.
> + *
> + * Author:
> + * Haibo Chen <haibo.chen at nxp.com>
> + * Co-author:
> + * Han Xu <han.xu at nxp.com>
> + */
> +
[...]
> +static int nxp_xspi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
> +{
> + struct nxp_xspi *xspi = spi_controller_get_devdata(mem->spi->controller);
> + void __iomem *base = xspi->iobase;
> + u32 reg;
> + int err;
> +
> + guard(mutex)(&xspi->lock);
> +
> + err = pm_runtime_get_sync(xspi->dev);
> + if (err < 0) {
> + dev_err(xspi->dev, "Failed to enable clock %d\n", __LINE__);
> + return err;
> + }
> +
> + /* Wait for controller being ready. */
> + err = readl_poll_timeout(base + XSPI_SR, reg,
> + !(reg & XSPI_SR_BUSY), 1, POLL_TOUT);
> + if (err) {
> + dev_err(xspi->dev, "SR keeps in BUSY!");
> + return err;
> + }
> +
> + nxp_xspi_select_mem(xspi, mem->spi, op);
> +
> + nxp_xspi_prepare_lut(xspi, op);
> +
> + /*
> + * For read:
> + * the address in AHB mapped range will use AHB read.
> + * the address out of AHB maped range will use IP read.
^^^^^
typo: mapped
regards,
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
Vertretung Nürnberg | Phone: +49-5121-206917-129 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
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