[PATCH] PCI: j721e: Add config guards for Cadence Host and Endpoint library APIs

[Arnd Bergmann]

On Mon, Nov 17, 2025, at 12:32, Siddharth Vadapalli wrote:
> Commit under Fixes enabled loadable module support for the driver under
> the assumption that it shall be the sole user of the Cadence Host and
> Endpoint library APIs. This assumption guarantees that we won't end up
> in a case where the driver is built-in and the library support is built
> as a loadable module.
>
> With the introduction of [1], this assumption is no longer valid. The
> SG2042 driver could be built as a loadable module, implying that the
> Cadence Host library is also selected as a loadable module. However, the
> pci-j721e.c driver could be built-in as indicated by CONFIG_PCI_J721E=y
> due to which the Cadence Endpoint library is built-in. Despite the
> library drivers being built as specified by their respective consumers,
> since the 'pci-j721e.c' driver has references to the Cadence Host
> library APIs as well, we run into a build error as reported at [0].
>
> Fix this by adding config guards as a temporary workaround. The proper
> fix is to split the 'pci-j721e.c' driver into independent Host and
> Endpoint drivers as aligned at [2].
>
> Fixes: a2790bf81f0f ("PCI: j721e: Add support to build as a loadable 
> module")
> Reported-by: kernel test robot <lkp at intel.com>
> Closes: 
> https://lore.kernel.org/oe-kbuild-all/202511111705.MZ7ls8Hm-lkp@intel.com/
> Cc: <stable at vger.kernel.org>
> [0]: https://lore.kernel.org/r/202511111705.MZ7ls8Hm-lkp@intel.com/
> [1]: commit 1c72774df028 ("PCI: sg2042: Add Sophgo SG2042 PCIe driver")
> [2]: 
> https://lore.kernel.org/r/37f6f8ce-12b2-44ee-a94c-f21b29c98821@app.fastmail.com/
> Suggested-by: Arnd Bergmann <arnd at arndb.de>
> Signed-off-by: Siddharth Vadapalli <s-vadapalli at ti.com>

Looks good to me,

Reviewed-by: Arnd Bergmann <arnd at arndb.de>