[PATCH v2] dt-bindings: usb: dwc3-xilinx: Describe the reset constraint for the versal platform
Radhey Shyam Pandey
radhey.shyam.pandey at amd.com
Fri Nov 14 04:32:39 PST 2025
AMD Versal platform USB 2.0 IP controller receives one reset input from
the SoC controlled by the CRL.RST_USB [RESET] register so accordingly
describe reset constraints.
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey at amd.com>
---
Changes for v2:
- As suggested by Conor remove oneOf stuff since both platforms
have the same first reset.
- In compatible else case drop maxItems as is not needed as it
matches the number in the list.
---
.../devicetree/bindings/usb/dwc3-xilinx.yaml | 22 +++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
index 36f5c644d959..d6823ef5f9a7 100644
--- a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
+++ b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
@@ -47,6 +47,7 @@ properties:
- const: ref_clk
resets:
+ minItems: 1
description:
A list of phandles for resets listed in reset-names.
@@ -56,6 +57,7 @@ properties:
- description: USB APB reset
reset-names:
+ minItems: 1
items:
- const: usb_crst
- const: usb_hibrst
@@ -95,6 +97,26 @@ required:
- resets
- reset-names
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - xlnx,versal-dwc3
+ then:
+ properties:
+ resets:
+ maxItems: 1
+ reset-names:
+ maxItems: 1
+ else:
+ properties:
+ resets:
+ minItems: 3
+ reset-names:
+ minItems: 3
+
additionalProperties: false
examples:
base-commit: 6d7e7251d03f98f26f2ee0dfd21bb0a0480a2178
--
2.34.1
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