[PATCH v2 3/3] arm64: dts: realtek: Add Kent SoC and EVB device trees

[Krzysztof Kozlowski]

On 13/11/2025 13:30, Yu-Chun Lin wrote:
> +
> +	soc at 0 {
> +		compatible = "simple-bus";
> +		ranges = <0x0 0x0 0x0 0x40000>, /* boot code */
> +			 <0x98000000 0x0 0x98000000 0xef0000>, /* rbus */
> +			 <0xa0000000 0x0 0xa0000000 0x10000000>, /* PCIE */
> +			 <0xff000000 0x0 0xff000000 0x200000>; /* GIC */
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +
> +		rbus: bus at 98000000 {
> +			compatible = "simple-bus";
> +			ranges = <0x0 0x98000000 0xef0000>,
> +				 <0xa0000000 0xa0000000 0x10000000>; /* PCIE */
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +
> +			iso: syscon at 7000 {
> +				compatible = "realtek,misc", "syscon", "simple-mfd";

No, you just said "misc" is not part of the soc, right? I asked last
time and since you now send the same, so clearly you intentionally claim
this is not part of a SoC... Please just read writing bindings first.

> +				reg = <0x7000 0x1000>;
> +				ranges = <0x0 0x7000 0x1000>;
> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +
> +				uart0: serial at 800 {
> +					compatible = "snps,dw-apb-uart";
> +					reg = <0x800 0x100>;
> +					clock-frequency = <432000000>;
> +					interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
> +					reg-io-width = <4>;
> +					reg-shift = <2>;
> +					status = "disabled";
> +				};
> +			};
> +		};
> +


Best regards,
Krzysztof