[PATCH v6 09/11] coresight: etm4x: Add flag to retain single-shot status

[Mike Leach]

On Tue, 11 Nov 2025 at 18:59, Leo Yan <leo.yan at arm.com> wrote:
>
> Add a 'retain_ss_status' flag to the config structure.
>
> By default, the flag is set to zero so that the TRCSSCSRn.STATUS bit
> is cleared to restart the single-shot mode.
>
> If the flag is set, the single-shot status will be retained, thus
> avoiding restart the single-shot. The retain flag is automatically
> cleared to restore the default behavior on the next call.
>
> Signed-off-by: Leo Yan <leo.yan at arm.com>
> ---
>  drivers/hwtracing/coresight/coresight-etm4x-core.c | 15 ++++++++++++---
>  drivers/hwtracing/coresight/coresight-etm4x.h      |  2 ++
>  2 files changed, 14 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> index 560975b70474c3449aa6799fc1a8e05d5ea93495..8b85a73e29f407a8d5e26a25f4dceaadaeed05ed 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> @@ -565,9 +565,18 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata)
>                 etm4x_relaxed_write32(csa, config->res_ctrl[i], TRCRSCTLRn(i));
>
>         for (i = 0; i < drvdata->nr_ss_cmp; i++) {
> -               /* always clear status bit on restart if using single-shot */
> -               if (config->ss_ctrl[i] || config->ss_pe_cmp[i])
> -                       config->ss_status[i] &= ~TRCSSCSRn_STATUS;
> +               if (!config->retain_ss_status) {
> +                       /* always clear status bit on restart if using single-shot */
> +                       if (config->ss_ctrl[i] || config->ss_pe_cmp[i])
> +                               config->ss_status[i] &= ~TRCSSCSRn_STATUS;
> +               } else {
> +                       /*
> +                        * Leave the single-shot status unchanged; clear the
> +                        * retain flag to restore the default behavior
> +                        * (restart single-shot) for the next call.
> +                        */
> +                       config->retain_ss_status = 0;
> +               }
>                 etm4x_relaxed_write32(csa, config->ss_ctrl[i], TRCSSCCRn(i));
>                 etm4x_relaxed_write32(csa, config->ss_status[i], TRCSSCSRn(i));
>                 if (etm4x_sspcicrn_present(drvdata, i))
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h
> index 012c52fd19338133129752d35523dc102df24604..d82ec1559b34787dffc7debf4643d948e3850b2a 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x.h
> +++ b/drivers/hwtracing/coresight/coresight-etm4x.h
> @@ -802,6 +802,7 @@ enum etm_impdef_type {
>   * @ss_ctrl:   Controls the corresponding single-shot comparator resource.
>   * @ss_status: The status of the corresponding single-shot comparator.
>   * @ss_pe_cmp: Selects the PE comparator inputs for Single-shot control.
> + * @retain_ss_status: Retains single-shot status.
>   * @addr_idx:  Address comparator index selector.
>   * @addr_val:  Value for address comparator.
>   * @addr_acc:  Address comparator access type.
> @@ -846,6 +847,7 @@ struct etmv4_config {
>         u32                             ss_ctrl[ETM_MAX_SS_CMP];
>         u32                             ss_status[ETM_MAX_SS_CMP];
>         u32                             ss_pe_cmp[ETM_MAX_SS_CMP];
> +       u8                              retain_ss_status;
>         u8                              addr_idx;
>         u64                             addr_val[ETM_MAX_SINGLE_ADDR_CMP];
>         u64                             addr_acc[ETM_MAX_SINGLE_ADDR_CMP];
>
> --
> 2.34.1
>

Reviewed-by: Mike Leach <mike.leach at linaro.org>

--
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK