[PATCH RFC 0/4] Introduce 128-bit IO access
Chenghai Huang
huangchenghai2 at huawei.com
Tue Nov 11 17:58:42 PST 2025
These patches introduce 128-bit IO access functionality. The reason
is that the current HiSilicon cryptographic devices need to
maintain atomic operations when accessing 128-bit MMIO across
physical and virtual functions.
Currently, 128-bit atomic writes have already been implemented in
the device driver, and the driver also depends on a 128-bit atomic
read access interface. Therefore, we have introduced a generic
128-bit IO access interface to replace the implementation of
128-bit read and write IO interfaces using instructions in the
device driver. When the architecture does not support 128-bit
atomic operations, non-atomic 128-bit read and write interfaces can
be used to make the driver functional.
Weili Qian (4):
UAPI: Introduce 128-bit types and byteswap operations
asm-generic/io.h: add io{read,write}128 accessors
io-128-nonatomic: introduce io{read|write}128_{lo_hi|hi_lo}
arm64/io: Add {__raw_read|__raw_write}128 support
arch/arm64/include/asm/io.h | 21 +++++++++
include/asm-generic/io.h | 48 ++++++++++++++++++++
include/linux/io-128-nonatomic-hi-lo.h | 35 ++++++++++++++
include/linux/io-128-nonatomic-lo-hi.h | 34 ++++++++++++++
include/uapi/linux/byteorder/big_endian.h | 6 +++
include/uapi/linux/byteorder/little_endian.h | 6 +++
include/uapi/linux/swab.h | 10 ++++
include/uapi/linux/types.h | 3 ++
8 files changed, 163 insertions(+)
create mode 100644 include/linux/io-128-nonatomic-hi-lo.h
create mode 100644 include/linux/io-128-nonatomic-lo-hi.h
--
2.33.0
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