[PATCH v6 01/11] arm64: dts: imx95-15x15-evk: Add supports-clkreq property to PCIe M.2 port

[Frank Li]

On Tue, Nov 11, 2025 at 08:02:35AM +0000, Hongxing Zhu wrote:
> > -----Original Message-----
> > From: Shawn Guo <shawnguo2 at yeah.net>
> > Sent: 2025年11月11日 15:11
> > To: Hongxing Zhu <hongxing.zhu at nxp.com>
> > Cc: Frank Li <frank.li at nxp.com>; l.stach at pengutronix.de;
> > lpieralisi at kernel.org; kwilczynski at kernel.org; mani at kernel.org;
> > robh at kernel.org; krzk+dt at kernel.org; conor+dt at kernel.org;
> > bhelgaas at google.com; shawnguo at kernel.org; s.hauer at pengutronix.de;
> > kernel at pengutronix.de; festevam at gmail.com; linux-pci at vger.kernel.org;
> > linux-arm-kernel at lists.infradead.org; devicetree at vger.kernel.org;
> > imx at lists.linux.dev; linux-kernel at vger.kernel.org
> > Subject: Re: [PATCH v6 01/11] arm64: dts: imx95-15x15-evk: Add
> > supports-clkreq property to PCIe M.2 port
> >
> > On Wed, Oct 15, 2025 at 11:04:18AM +0800, Richard Zhu wrote:
> > > According to PCIe r6.1, sec 5.5.1.
> > >
> > > The following rules define how the L1.1 and L1.2 substates are entered:
> > > Both the Upstream and Downstream Ports must monitor the logical state
> > > of the CLKREQ# signal.
> > >
> > > Typical implement is using open drain, which connect RC's clkreq# to
> > > EP's clkreq# together and pull up clkreq#.
> > >
> > > imx95-15x15-evk matches this requirement, so add supports-clkreq to
> > > allow PCIe device enter ASPM L1 Sub-State.
> > >
> > > Signed-off-by: Richard Zhu <hongxing.zhu at nxp.com>
> > > ---
> > >  arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts | 1 +
> > >  1 file changed, 1 insertion(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> > > b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> > > index 148243470dd4a..3ee032c154fa3 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> > > +++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> > > @@ -556,6 +556,7 @@ &pcie0 {
> > >  	pinctrl-names = "default";
> > >  	reset-gpio = <&gpio5 13 GPIO_ACTIVE_LOW>;
> > >  	vpcie-supply = <&reg_m2_pwr>;
> > > +	supports-clkreq;
> >
> > Is binding updated for this property?
> >
> > Shawn
> >
> Hi Shawn:
> As I know that It's a documented binding property as below.
> - supports-clkreq:
>    If present this property specifies that CLKREQ signal routing exists from
>    root port to downstream device and host bridge drivers can do programming
>    which depends on CLKREQ signal existence. For example, programming root port
>    not to advertise ASPM L1 Sub-States support if there is no CLKREQ signal.
> ./Documentation/devicetree/bindings/pci/pci.txt

Shawn:

	This file should be removed. It is already merge to Rob's dt-scheme
as PCIe standard properties.

See: https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/pci/pci-bus-common.yaml

Frank

>
> Best Regards
> Richard Zhu
>
> > >  	status = "okay";
> > >  };
> > >
> > > --
> > > 2.37.1
> > >
>