[PATCH v4 0/3] Coresight TMC-ETR: refactor the tmc-etr mode and some cleanups
Junhao He
hejunhao3 at h-partners.com
Tue Nov 11 04:21:46 PST 2025
This patchset builds upon Yicong's previous patches [1].
Patch 2 introducing fix race issues found by using TMC-ETR.
Patch 1 & 3 introducing two cleanups found when debugging the issues.
[1] https://lore.kernel.org/linux-arm-kernel/20241202092419.11777-1-yangyicong@huawei.com/
---
Changes in v4:
- a) Add comment at the context of set etr to sysfs mode.
- b) Move the check on drvdata->read to the start of enable etr.
- c) Add checks to prevent multiple sysfs processes from simultaneously
competing to enable ETR.
- d) Fix the issue with the guard used.
Link: https://lore.kernel.org/linux-arm-kernel/20250818080600.418425-1-hejunhao3@huawei.com/
---
Changes in v3:
- Patches 1: Additional comment for tmc_drvdata::etr_mode. Update
comment for tmc_drvdata::reading with Jonathan's Tag.
- Patches 2: Replace scoped_guard with guard with Jonathan's Tag.
- Patches 2: Fix spinlock to raw_spinlock, and refactor this code based
on Leo's suggested solution.
- Patches 3: change the size's type to ssize_t and use max_t to simplify
the code with Leo's Tag.
Link: https://lore.kernel.org/linux-arm-kernel/20250620075412.952934-1-hejunhao3@huawei.com/
Changes in v2:
- Updated the commit of patch2.
- Rebase to v6.16-rc1
Junhao He (1):
coresight: tmc: refactor the tmc-etr mode setting to avoid race
conditions
Yicong Yang (2):
coresight: tmc: Add missing doc including reading and etr_mode of
struct tmc_drvdata
coresight: tmc: Decouple the perf buffer allocation from sysfs mode
.../hwtracing/coresight/coresight-tmc-etr.c | 136 +++++++++---------
drivers/hwtracing/coresight/coresight-tmc.h | 2 +
2 files changed, 66 insertions(+), 72 deletions(-)
--
2.33.0
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