[PATCH v7 5/7] arm64: Add support for FEAT_{LS64, LS64_V}

[Marc Zyngier]

On Fri, 07 Nov 2025 07:21:25 +0000,
Zhou Wang <wangzhou1 at hisilicon.com> wrote:
> 
> From: Yicong Yang <yangyicong at hisilicon.com>
> 
> Armv8.7 introduces single-copy atomic 64-byte loads and stores
> instructions and its variants named under FEAT_{LS64, LS64_V}.
> These features are identified by ID_AA64ISAR1_EL1.LS64 and the
> use of such instructions in userspace (EL0) can be trapped. In
> order to support the use of corresponding instructions in userspace:
> - Make ID_AA64ISAR1_EL1.LS64 visbile to userspace
> - Add identifying and enabling in the cpufeature list
> - Expose these support of these features to userspace through HWCAP3
>   and cpuinfo
> 
> ld64b/st64b (FEAT_LS64) and st64bv (FEAT_LS64_V) is intended for
> special memory (device memory) so requires support by the CPU, system
> and target memory location (device that support these instructions).
> The HWCAP3_{LS64, LS64_V} implies the support of CPU and system (since
> no identification method from system, so SoC vendors should advertise
> support in the CPU if system also support them).

But this doesn't mean that the system actually supports this. It is
also trivial for EL0 to spoof a PASID using ST64BV, by populating the
bottom 32bit with whatever it wants (hiding ST64BV0 doesn't prevent
this).

In all honestly, I'm starting to think that we cannot safely expose
this to userspace, at least not without strong guarantees coming from
the system itself.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.