[PATCH v6 01/11] arm64: dts: imx95-15x15-evk: Add supports-clkreq property to PCIe M.2 port

Shawn Guo shawnguo2 at yeah.net
Mon Nov 10 23:11:14 PST 2025


On Wed, Oct 15, 2025 at 11:04:18AM +0800, Richard Zhu wrote:
> According to PCIe r6.1, sec 5.5.1.
> 
> The following rules define how the L1.1 and L1.2 substates are entered:
> Both the Upstream and Downstream Ports must monitor the logical state of
> the CLKREQ# signal.
> 
> Typical implement is using open drain, which connect RC's clkreq# to
> EP's clkreq# together and pull up clkreq#.
> 
> imx95-15x15-evk matches this requirement, so add supports-clkreq to
> allow PCIe device enter ASPM L1 Sub-State.
> 
> Signed-off-by: Richard Zhu <hongxing.zhu at nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> index 148243470dd4a..3ee032c154fa3 100644
> --- a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> @@ -556,6 +556,7 @@ &pcie0 {
>  	pinctrl-names = "default";
>  	reset-gpio = <&gpio5 13 GPIO_ACTIVE_LOW>;
>  	vpcie-supply = <&reg_m2_pwr>;
> +	supports-clkreq;

Is binding updated for this property?

Shawn

>  	status = "okay";
>  };
>  
> -- 
> 2.37.1
> 




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