[PATCH v2 3/3] arm64: dts: renesas: r8a77965: Add GE7800 GPU node

[Matt Coster]

On 04/11/2025 13:56, Marek Vasut wrote:
> Describe Imagination Technologies PowerVR Rogue GE7800 BNVC 15.5.1.64
> present in Renesas R-Car R8A77965 M3-N SoC.
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas at glider.be>
> Signed-off-by: Marek Vasut <marek.vasut+renesas at mailbox.org>

Just for completeness:

Acked-by: Matt Coster <matt.coster at imgtec.com>

Cheers,
Matt

> ---
> Cc: Conor Dooley <conor+dt at kernel.org>
> Cc: David Airlie <airlied at gmail.com>
> Cc: Frank Binns <frank.binns at imgtec.com>
> Cc: Geert Uytterhoeven <geert+renesas at glider.be>
> Cc: Krzysztof Kozlowski <krzk+dt at kernel.org>
> Cc: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
> Cc: Magnus Damm <magnus.damm at gmail.com>
> Cc: Matt Coster <matt.coster at imgtec.com>
> Cc: Maxime Ripard <mripard at kernel.org>
> Cc: "Niklas Söderlund" <niklas.soderlund at ragnatech.se>
> Cc: Rob Herring <robh at kernel.org>
> Cc: Simona Vetter <simona at ffwll.ch>
> Cc: Thomas Zimmermann <tzimmermann at suse.de>
> Cc: devicetree at vger.kernel.org
> Cc: dri-devel at lists.freedesktop.org
> Cc: linux-renesas-soc at vger.kernel.org
> ---
> V2: Add RB from Geert
> ---
>  arch/arm64/boot/dts/renesas/r8a77965.dtsi | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> index 0868b136883c..4e730144e5fd 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> @@ -2450,6 +2450,23 @@ gic: interrupt-controller at f1010000 {
>  			resets = <&cpg 408>;
>  		};
>  
> +		gpu: gpu at fd000000 {
> +			compatible = "renesas,r8a77965-gpu",
> +				     "img,img-ge7800",
> +				     "img,img-rogue";
> +			reg = <0 0xfd000000 0 0x40000>;
> +			interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_CORE R8A77965_CLK_ZG>,
> +				 <&cpg CPG_CORE R8A77965_CLK_S2D1>,
> +				 <&cpg CPG_MOD 112>;
> +			clock-names = "core", "mem", "sys";
> +			power-domains = <&sysc R8A77965_PD_3DG_A>,
> +					<&sysc R8A77965_PD_3DG_B>;
> +			power-domain-names = "a", "b";
> +			resets = <&cpg 112>;
> +			status = "disabled";
> +		};
> +
>  		pciec0: pcie at fe000000 {
>  			compatible = "renesas,pcie-r8a77965",
>  				     "renesas,pcie-rcar-gen3";


-- 
Matt Coster
E: matt.coster at imgtec.com
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