[PATCH v1 3/8] KVM: arm64: Enable LS64 instructions when supported by guest

[Fuad Tabba]

The FEAT_LS64* family (FEAT_LS64, FEAT_LS64_V, FEAT_LS64_ACCDATA)
enables support for LD64B, ST64B, and their variants. If a guest is
advertised these features, KVM should not trap accesses to these
instructions to EL2.

This is controlled by the HCRX_EL2_EnASR, HCRX_EL2_EnALS, and
HCRX_EL2_EnAS0 bits. When clear, these bits trap the corresponding
instructions. KVM did not set them, which would cause guest-supported
instructions to trap.

This also created a state mismatch for nested virtualization, which
validates its own HCRX_EL2 value against the features advertised in the
guest's ID_AA64ISAR1_EL1 (in handle_other()).

Fix this by checking for each FEAT_LS64* variant in
vcpu_set_hcrx() and setting the corresponding HCRX_EL2 enable
bit if the guest supports the feature.

Signed-off-by: Fuad Tabba <tabba at google.com>
---
 arch/arm64/include/asm/kvm_emulate.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h
index 3fc62808c548..7880e8290a20 100644
--- a/arch/arm64/include/asm/kvm_emulate.h
+++ b/arch/arm64/include/asm/kvm_emulate.h
@@ -691,6 +691,15 @@ static inline void vcpu_set_hcrx(struct kvm_vcpu *vcpu)
 		if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, NMI, IMP))
 			vcpu->arch.hcrx_el2 |= HCRX_EL2_TALLINT;
 
+		if (kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_V))
+			vcpu->arch.hcrx_el2 |= HCRX_EL2_EnASR;
+
+		if (kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64))
+			vcpu->arch.hcrx_el2 |= HCRX_EL2_EnALS;
+
+		if (kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_ACCDATA))
+			vcpu->arch.hcrx_el2 |= HCRX_EL2_EnAS0;
+
 		if (kvm_has_tcr2(kvm))
 			vcpu->arch.hcrx_el2 |= HCRX_EL2_TCR2En;
 
-- 
2.51.2.997.g839fc31de9-goog